PM5366-PI PMC-Sierra, Inc., PM5366-PI Datasheet - Page 209
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PM5366-PI
Manufacturer Part Number
PM5366-PI
Description
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5366-PI.pdf
(267 pages)
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PRELIMINARY
DATASHEET
PMC-2010672
12.12.1
PROPRIETARY AND CONFIDENTIAL
The boundary scan architecture consists of a TAP controller, an instruction
register with instruction decode, a bypass register, a device identification register
and a boundary scan register. The TAP controller interprets the TMS input and
generates control signals to load the instruction and data registers. The
instruction register with instruction decode block is used to select the test to be
executed and/or the register to be accessed. The bypass register offers a single-
bit delay from primary input, TDI to primary output, TDO. The device
identification register contains the device identification code.
The boundary scan register allows testing of board inter-connectivity. The
boundary scan register consists of a shift register placed in series with device
inputs and outputs. Using the boundary scan register, all digital inputs can be
sampled and shifted out on primary output, TDO. In addition, patterns can be
shifted in on primary input, TDI, and forced onto all digital outputs.
The TAP controller is a synchronous finite state machine clocked by the rising
edge of primary input, TCK. All state transitions are controlled using primary
input, TMS. The finite state machine is described below.
TAP Controller
ISSUE 1
197
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PM5366 TEMAP-84
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