A43L0616V-8 AMIC Technology, Corp., A43L0616V-8 Datasheet - Page 29

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A43L0616V-8

Manufacturer Part Number
A43L0616V-8
Description
512K x 16 Bit x 2 Banks Synchronous DRAM
Manufacturer
AMIC Technology, Corp.
Datasheet
(October, 1999, Version 0.0)
Page Write Cycle at Different Bank @Burst Length=4
CLOCK
A10/AP
ADDR
RAS
CAS
DQM
CKE
DQ
* Note:
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and precharge banks must be the same.
CS
BA
WE
Row Active with
0
(A-Bank)
RAa
RAa
1
2
3
(A-Bank)
DAa0 DAa1 DAa2 DAa3
CAa
Write
4
Row Active
(B-Bank)
RBb
RBb
5
6
7
t
CDL
(B-Bank)
Write
DBb0
CBb
8
DBb1
9
28
High
DBb2 DBb3 DAc0 DAc1
10
11
(A-Bank)
CAc
Write
12
13
(B-Bank)
DBd0 DBd1
Write
CBd
14
AMIC Technology, Inc.
*Note 1
15
(Both Banks)
t
RDL
Precharge
16
*Note 2
17
A43L0616
: Don't care
18
19

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