A43L0616V-8 AMIC Technology, Corp., A43L0616V-8 Datasheet - Page 17

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A43L0616V-8

Manufacturer Part Number
A43L0616V-8
Description
512K x 16 Bit x 2 Banks Synchronous DRAM
Manufacturer
AMIC Technology, Corp.
Datasheet
3. CAS Interrupt (I)
Note : 1. By “Interrupt”, It is possible to stop burst read/write by external command before the end of burst.
(October, 1999, Version 0.0)
DQ(CL2)
DQ(CL3)
2. t
3. tCDL : Last data in to new column address delay. ( = 1CLK).
CMD
CMD
ADD
ADD
CKL
CKL
DQ
By “
CCD
CAS
:
1) Read intreupted by Read (BL=4)
CAS
2) Write interrupted by (Block) Write (BL =2)
DA0
RD
WR
Interrupt”, to stop burst read/write by
A
A
Note2
Note3
to
t
t
t
CCD
CCD
CDL
CAS
DB0
WR
RD
B
B
Note2
QA0
delay. (=1CLK)
DB1
QB0
QA0
QB0 QB1
DC0
QB1 QB2
WR
C
Note 1
t
Note3
t
CCD
CDL
Pixel
BW
D
Note2
Note4
QB3
QB2 QB3
CAS
16
access; read, write and block write.
DQ(CL2)
DQ(CL3)
3) Write interrupted by Read (BL =2)
WR
DA0
DA0
A
Note3
t
t
CCD
CDL
RD
B
Note2
AMIC Technology, Inc.
QB0
A43L0616
Pixel
QB0
QB1

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