FAN6920MR Fairchild Semiconductor, FAN6920MR Datasheet - Page 22

• Manufacturer Part Number: FAN6920MR
• Description: The highly integrated FAN6920MR combines Power Factor Correction (PFC) controller and quasi-resonant PWM controller
• Manufacturer: Fairchild Semiconductor

© 2010 Fairchild Semiconductor Corporation
FAN6920MR • Rev. 1.0.5
Output Over-Voltage Protection (DET Pin)
Referring to Figure 1, during the discharge time of PWM
transformer inductor; the voltage across on auxiliary
winding is reflected from secondary winding and
therefore the flat voltage on the DET pin is proportional
to the output voltage. FAN6920MR can sample this flat
voltage level after a t
over-voltage protection. This t
to ignore the voltage ringing from leakage inductance of
PWM transformer. The sampling flat voltage level is
compared with internal threshold voltage 2.5V and, once
the protection is activated, FAN6920MR enters auto-
recovery protection.
The controller can protect rapidly by this kind of cycle-
by-cycle sampling method in the case of output over
voltage. The protection voltage level can be determined
by the ratio of external resistor divider R
flat voltage on DET pin can be expressed by the
following equation:
V
DET
PWM
V
Gate
V
AUX
DET

Figure 46. Operation Waveform of Output

V
N N
O
PFC
Blanking

V 
A
0.3V
N
N
O
t
S
OFF
A
_

N
N
V
R
S
A
S
O
DET


Over-Voltage Detection

R
N
N
A

V
A
P
R
OFF
O
A

blanking time to perform output
R
Sampling
DET
Here
R
OFF
A

R
blanking time is used
A
A
and R
DET
. The
t
t
t
(2)
Open-Loop, Short-Circuit, and Overload Protection
(FB Pin)
Referring to Figure 47; outside of FAN6920MR, the FB
pin is connected to the collector of transistor of an opto-
coupler. Inside, the FB pin is connected to an internal
voltage bias through a resistor of around 5k.
As the output loading is increased, the output voltage is
decreased and the sink current of the transistor of the
opto-coupler on primary side is reduced. The FB pin
voltage is increased by internal voltage bias. In the case
of an open loop, output short-circuit, or overload
condition; this sink current is further reduced and the FB
pin voltage is pulled HIGH by internal bias voltage.
When the FB pin voltage is higher than 4.2V for 50ms,
the FB pin protection is activated.
Under-Voltage Lockout (UVLO, VDD Pin)
Referring to Figure 1 and Figure 39, the turn-on and
turn-off V
10V, respectively. During startup, the hold-up capacitor
(V
V
output voltage rises to rated voltage and delivers energy
to the V
capacitor must sustain the V
operation. When V
FAN6920MR starts all switching operation if no
protection is triggered before V
off voltage V
22
DD
DD
Figure 47. FB Pin Open-Loop, Short Circuit,
voltage reaches the turn-on voltage. Before the
capacitor) is charged by HV startup current until
DD
DD
capacitor from auxiliary winding, this hold-up
DD-PWM-OFF
threshold voltages are fixed at 18V and
and Overload Protection
DD
.
voltage reaches turn-on voltage,
DD
DD
voltage drops to turn-
voltage energy for
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