TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 497

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

17 Watchdog Timer (WDT)
17.2 Outline
17.2.1 INTWDT (WDMOD<RESCR>=0)
17.2.2 Reset Mode(WDMOD<RESCR>=1)
WDT counter
INTWDT
WDT clear
The watchdog timer consists of the binary counters that are arranged in 25 stages and work using the
f
2
generated when an overflow occurs, as shown in Fig 17-2.
When an overflow occurs, resetting the chip itself is an option to choose. If the chip is reset, a reset is
affected for a 32-state time, as shown in Fig 17-3. If this reset is affected, the clock f
gear generates by dividing the clock f
WDT counter
INTWDT
Internal reset
SYS
21
, 2
When an overflow occurs, the watchdog timer generates INTWDT to the CPU.
system clock as an input clock. The outputs produced by these binary counters are 2
23
are 2
25
.By selecting one of these outputs with WDMOD <WDTP2:0>, INTWDT can be
n
n
Overflow
TMPM380/M382 - 2 / 6 -
(3.2 μs @ fosc = 10 MHz, f
Fig 17-2 Normal Mode
Fig 17-3 Reset Mode
C
of the high-speed oscillator by 1 is used as an input clock f
Overflow
32-state
Write of a clear code
C
= fsys = 10 MHz,)
TMPM380/M382
SYS
0
that the clock
15
, 2
17
, 2
SYS
19
,
.