TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 282

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

10 16-bit Multi-purpose Timers (MPTs)
•
and lower phases are switched to prevent a short circuit. The dead time is set to the Dead Time Register
(DTR) as an 8-bit value with a resolution of 200 ns at 40 MHz.
phases to be independently set through MDPOT<POLH> and <POLL>.
Dead Time Register (MTPDnDTR)
<DTR>: Dead time
Read/Write
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
The dead time circuit consists of a dead time unit and an output polarity switching unit.
For each of the U, V and W phases, the ON delay circuit introduces a delay (dead time) when the upper
The output polarity switching circuit allows the polarity (active high or active low) of the upper and lower
After reset
After reset
After reset
After reset
200 nsec × 8 bits (up to 51 μs at fsys = 40 MHz)
* Do not change this register while MTPDnMDEN<PWMEN>=1.
10.7.3.4
R→0
R→0
R→0
0x4005 0444, 0x4005 04C4
Dead Time Circuit
31
23
15
0
0
0
7
0
-
-
-
fsys/8
w’
u’
v’
y’
z’
x’
R→0
R→0
R→0
30
22
14
0
0
0
6
0
-
-
-
ON Delay Circuit
ON Delay Circuit
ON Delay Circuit
TMPM380/M382 - 82 / 87 -
Fig 10-7 Dead Time Circuit
R→0
R→0
R→0
29
21
13
0
0
0
5
0
-
-
-
MTPDnDTR
R→0
R→0
R→0
28
20
12
0
0
0
4
0
-
-
-
DTR
R/W
MTPDnMDPOT
R→0
R→0
R→0
27
19
11
0
0
0
0
3
-
-
-
<POLL>
MTPDnMDPOT
<POLH>
R→0
R→0
R→0
26
18
10
0
0
0
0
2
-
-
-
R→0
R→0
R→0
25
17
Y
X
W
U
V
Z
0
0
9
0
0
1
-
-
-
TMPM380/M382
R→0
R→0
R→0
24
16
0
0
8
0
0
0
-
-
-