73S1209F Maxim, 73S1209F Datasheet - Page 88

• Manufacturer Part Number: 73S1209F
• Description: The 73S1209F is a self-contained, SoC smart card reader IC that is an ideal solution for serially connected ISO 7816 design
• Manufacturer: Maxim

This register is used to monitor reception of data from the smart card.
Smart Card Control Register (SCCtl): 0xFE0A
88
SCCtl.7
SCCtl.6
SCCtl.5
SCCtl.4
SCCtl.3
SCCtl.2
SCCtl.1
SCCtl.0
Bit
MSB
RSTCRD
RSTCRD
CLKOFF
CLKLVL
Symbol
IOD
C8
C4
IO
–
–
1 = Asserts the RST (set RST = 0) to the smart card interface, 0 = De-assert
the RST (set RST = 1) to the smart card interface. Can be used to extend
RST to the smart card. Refer to the
operational in all modes and can be used to extend RST during activation or
perform a “Warm Reset” as required. In auto-sequence mode, this bit
should be set = 0 to allow the sequencer to de-assert RST per the
parameters.
In sync mode (see the
if set =1 , RST = 1, if set = 0, RST = 0. Rlen has no effect on Reset in sync
mode.
Smart Card I/O. Read is state of I/O signal (Caution, this signal is not
synchronized to the MPU clock). In Bypass mode, write value is state of
signal on I/O. In sync mode, this bit will contain the value of I/O pin on the
latest rising edge of CLK.
Smart Card I/O Direction control Bypass mode or sync mode. 1 = input
(default), 0 = output.
Smart Card C8. When C8 is an output, the value written to this bit will
appear on the C8 line. The value read when C8 is an output is the value
stored in the register. When C8 is an input, the value read is the value on
the C8 pin (Caution, this signal is not synchronized to the MPU clock).
When C8 is an input, the value written will be stored in the register but not
presented to the C8 pin.
Smart Card C4. When C4 is an output, the value written to this bit will
appear on the C4 line. The value read when C4 is an output is the value
stored in the register. When C4 is an input, the value read is the value on
the C4 pin (Caution, this signal is not synchronized to the MPU clock).
When C4 is an input, the value written will be stored in the register but not
presented to the C4 pin.
1 = High, 0 = Low. If CLKOFF is set = 1, the CLK to smart card will be at the
logic level indicated by this bit. If in bypass mode, this bit directly controls
the state of CLK.
0 = CLK is enabled. 1 = CLK is not enabled. When asserted, the CLK will
stop at the level selected by CLKLVL. This bit has no effect if in bypass
mode.
IO
Table 83: The SCCtl Register
IOD
SPrtcol
0x21
C8
register) the sense of this bit is non-inverted,
Function
RLength
C4
register description. This bit is
CLKLVL
CLKOFF
LSB
RLength
Rev. 1.2