71M6543F Maxim, 71M6543F Datasheet - Page 141

• Manufacturer Part Number: 71M6543F
• Description: The 71M6543F/71M6543H are Teridian's 4th-generation polyphase metering system-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power real-time clock (RTC) with digital temperature compensation, flash memory, and LCD driver
• Manufacturer: Maxim

v1.2
Parameter
VSYS to VLCD switch impedance
VBAT to VLCD switch impedance
LCD Boost Frequency
VLCD IOH current
From LCDADJ0 and LCDADJ12 fuses:
The above equations describe the nominal value of VLCD for a specific LCD_DAC value. The
specifications below list the maximum deviation between actual VLCD and VLCDnom. Note that when
VCC and boost are insufficient, the LCD DAC will not reach its target value and a large negative error
will occur.
LCD_DAC Error. VLCD-VLCDnom
Full Scale, with Boost
LCD_DAC Error. VLCD-VLCDnom
DAC=12, with Boost
LCD_DAC Error. VLCD-VLCDnom
Zero Scale, with Boost
LCD_DAC Error. VLCD-VLCDnom
Full Scale, no Boost
LCD_DAC Error. VLCD-VLCDnom
DAC=12, no Boost
VBAT=4.0 V, V3P3=0, BRN Mode
VBAT=2.5 V, V3P3=0, BRN Mode
(VLCD(0)-VLCD(IOH)<0.25)
V3P3 =3.6 V
V3P3 =3.0 V
V3P3 = 3.6 V
V3P3 = 3.0 V
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
V3P3 = 3.6 V
V3P3 = 3.0 V
VBAT = 4.0 V, V3P3 = 0 V, BRN Mode
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
V3P3 = 3.6 V (see note 1)
V3P3 = 3.0 V (see note 1)
VBAT = 4.0 V, V3P3 = 0 V, BRN Mode
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
V3P3 = 3.6 V
V3P3 = 3.0 V
VBAT = 4.0 V, V3P3 = 0 V, BRN Mode
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
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Condition
V3P3 = 3.3 V,
RVLCD=removed, LCD_BAT=0,
LCD_VMODE[1:0]=0,
∆ILCD=10 µA
V3P3 = 0 V, VBAT = 2.5 V,
RVLCD =removed, LCD_BAT =1,
LCD_VMODE[1:0]=0,
∆ILCD=10 µA
LCD_VMODE[1:0] = 2,
RVLCD = removed,
CVLCD = removed
LCD_VMODE[1:0] = 2,
LCD_CLK[1:0] = 2,
RVLCD = removed,
V3P3 = 3.3V,
LCD_DAC[4:0] = 1F
LCD_VMODE = 10,
LCD_DAC[4:0] = 1F,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE = 10,
LCD_DAC[4:0] = C,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE = 2,
LCD_DAC[4:0] =0,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE = 1,
LCD_DAC[4:0] = 1F,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE = 1,
LCD_DAC[4:0] = C,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
PLL_FAST=1
PLL_FAST=0
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31
71M6543F/H and 71M6543G/GH Data Sheet
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12
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-1.5
Min
-0.4
-1.3
-2.1
-2.8
-1.8
-3.2
-0.5
-1.1
10
1
1
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Typ
820
786
0.15
Max
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
750
700
1
Unit
kHz
kHz
µA
Ω
Ω
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
141