ST10R272L STMicroelectronics, ST10R272L Datasheet - Page 8

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ST10R272L

Manufacturer Part Number
ST10R272L
Description
16-BIT Romless MCU WITH MAC UNIT
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST10R272L

Cpu Frequency
0 to 50 MHz
Power
3.3 Volt +/-0.3V

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ST10R272L - PIN DESCRIPTION
8/77
1
ALE
EA
PORT0:
P0L.0–
P0L.7,
P0H.0 -
P0H.7
PORT1:
P1L.0–
P1L.7,
P1H.0 -
P1H.7
36
37
41 - 48
51 - 58
59- 66
67, 68
71-76
O
I
I/O
I/O
5T
5T
5T
5T
Table 1 Pin definitions
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the multi-
plexed bus modes.
External Access Enable pin. Low level at this pin during and
after reset forces the ST10R272L to begin instruction execu-
tion out of external memory. A high level forces execution out
of the internal ROM. The ST10R272L must have this pin tied
to ‘0’.
PORT0 has two 8-bit bidirectional I/O ports P0L and P0H. It is
bit-wise programmable for input or output via direction bits. For
a pin configured as input, the output driver is put into high-
impedance state.
For external bus configuration, PORT0 acts as address (A)
and address/data (AD) bus in multiplexed bus modes and as
the data (D) bus in demultiplexed bus modes.
PORT1 has two 8-bit bidirectional I/O ports P1L and P1H. It is
bit-wise programmable for input or output via direction bits. For
a pin configured as input, the output driver is put into high-
impedance state. PORT1 acts as a 16-bit address bus (A) in
demultiplexed bus modes and also after switching from a
demultiplexed bus mode to a multiplexed bus mode.
Demultiplexed bus modes
Multiplexed bus modes
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
8-bit
AD0 – AD7
A8 – A15
8-bit
D0 – D7
I/O
16-bit
AD0 - AD7
AD8 – AD15
16-bit
D0 - D7
D8 - D15

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