ST10R272L STMicroelectronics, ST10R272L Datasheet - Page 67
ST10R272L
Manufacturer Part Number
ST10R272L
Description
16-BIT Romless MCU WITH MAC UNIT
Manufacturer
STMicroelectronics
Datasheet
1.ST10R272L.pdf
(77 pages)
Specifications of ST10R272L
Cpu Frequency
0 to 50 MHz
Power
3.3 Volt +/-0.3V
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Cycle as programmed, including MCTC waitstates (Example shows 0 MCTC WS).
The leading edge of the respective command depends on RW-delay.
READY (or READY) sampled HIGH (resp. LOW) at this sampling point generates a
READY controlled waitstate, READY (resp. READY) sampled LOW (resp. HIGH) at this
sampling point terminates the currently running bus cycle.
READY (resp. READY) may be deactivated in response to the trailing (rising) edge of the
corresponding command (RD or WR).
If the Asynchronous READY (or READY) signal does not fulfill the indicated setup and
hold times with respect to CLKOUT (e.g. because CLKOUT is not enabled), it must fulfill t
37 in order to be safely synchronized. This is guaranteed, if READY is removed in
response to the command (see Note 4)).
Command
READY
READY
READY
READY
CLKOUT
RD, WR
Async
Async
Sync
Sync
ALE
t
t
t
58
58
32
Figure 24 CLKOUT and READY/READY
3)
3)
t
t
t
Running cycle 1)
t
59
59
34
30
2)
5)
t
t
33
31
t
t
t
t
35
58
35
58
5)
3)
3)
t
t
3)
37
37
3)
ST10R272L - ELECTRICAL CHARACTERISTICS
t
t
t
t
36
59
36
59
t
29
t
t
35
35
READY
3)
waitstate
3)
t
t
36
36
MUX/Tristate 6)
t
t
60
60
4)
4)
see 6)
7)
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