ST10R272L STMicroelectronics, ST10R272L Datasheet - Page 17

• Manufacturer Part Number: ST10R272L
• Description: 16-BIT Romless MCU WITH MAC UNIT
• Manufacturer: STMicroelectronics

Specifications of ST10R272L

• Cpu Frequency: 0 to 50 MHz
• Power: 3.3 Volt +/-0.3V

The following table shows the various combinations of pointer post-modification for each of
these 2 new addressing modes. In this document the symbols “[Rw
these addressing modes.
For the CoMACM class of instruction, Parallel Data Move mechanism is implemented. This
class of instruction is only available with double indirect addressing mode. Parallel Data Move
allows the operand pointed by IDX
operation. The write-back address of Parallel Data Move is calculated depending on the post-
modification of IDX
new value of IDX
Symbol
“[IDX i ]” stands for
“[Rw
Instruction
CoMACM [IDX
CoMACM [IDX
CoMACM [IDX
CoMACM [IDX
n
]” stands for
Table 2 Pointer post-modification combinations for IDXi and Rwn
i
i
i
i
+],...
-],...
+QX
-QX
i
. The following table shows these rules.
j
i
],...
j
. It is obtained by the reverse operation than the one used to calculate the
],...
Table 3 Parallel data move addressing
Mnemonic
[IDX i ]
[IDX i ]
[IDX i -]
[Rwn]
[Rwn ]
[Rwn-]
[Rwn QR j ]
[Rwn - QR j ]
[IDX i
[IDX i - QX j ]
QX j ]
i
to be moved to a new location in parallel with the MAC
ST10R272L - MULTIPLY-ACCUMULATE UNIT (MAC)
Address Pointer Operation
(IDX i )
(IDX i )
(IDX i )
(IDX i )
(IDX i )
(Rwn)
(Rwn)
(Rwn)
(Rwn)
(Rwn)
Writeback Address
<IDX
<IDX
<IDX
<IDX
i
i
i
i
(IDX i ) (no-op)
(IDX i ) +2 (i=0,1)
(IDX i ) -2 (i=0,1)
(IDX i ) + (QX j ) (i, j =0,1)
(IDX i ) - (QX j ) (i, j =0,1)
-2>
+2>
-QX
+QX
(Rwn) (no-op)
(Rwn) +2 (n=0-15)
(Rwn) -2 (k=0-15)
(Rwn) + (QR j ) (n=0-15;j =0,1)
(Rwn) - (QR j ) (n=0-15; j =0,1)
j
>
j
>
n
]” and “[IDX
i
]” refer to
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