ST10F276Z5 STMicroelectronics, ST10F276Z5 Datasheet - Page 33

• Manufacturer Part Number: ST10F276Z5
• Description: 16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
• Manufacturer: STMicroelectronics

Specifications of ST10F276Z5

• Single Voltage Supply: 5V ±10% (embedded regulator for 1.8 V core supply)

ST10F276Z5
4.4.4
Flash control register 1 high
The Flash control register 1 high (FCR1H), together with Flash control register 1 low
(FCR1L), is used to select the sectors to erase, or during any write operation to monitor the
status of each sector and each bank of the module selected by SMOD bit of FCR0H. First
diagram shows FCR1H meaning when SMOD=0; the second one when SMOD=1.
FCR1H (0x0E 0006) SMOD=0
FCR1H (0x0E 0006) SMOD=1
Table 10.
During any erase operation, these bits are automatically set and give the status of the 2
sectors of Bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of bank 1 is given by
the next
errors are detected.
SMOD=0 (XFLASH selected)
SMOD=1 (IFLASH selected)
15
15
B3F(1:0)
B1F(1:0)
B(3:2)S
B(1:0)S
Bit
14
14
Table
Flash control register 1 high
13
13
reserved
reserved
Bank 3 XFLASH sector 1:0 status
During any erase operation, these bits are automatically set and give the status of the
2 sectors of bank 3 (B3F1-B3F0). The meaning of B3Fy bit for sector y of bank 1 is
given by the next
operation if no errors are detected.
Bank 3-2 status (XFLASH)
During any erase operation, these bits are automatically modified and give the status
of the 2 Banks (B3-B2). The meaning of BxS bit for bank x is given in the next
Table
are detected.
Bank 1 IFLASH sector 1:0 status
During any erase operation, these bits are automatically set and give the status of the
2 sectors of bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of bank 1 is
given by the next Table 11. These bits are automatically reset at the end of a erase
operation if no errors are detected.
Bank 1-0 status (IFLASH)
During any erase operation, these bits are automatically modified and give the status
of the 2 banks (B1-B0). The meaning of BxS bit for bank x is given in the next
Table
are detected.
11. These bits are automatically reset at the end of a erase operation if no
-
12
12
11. These bits are automatically reset at the end of a erase operation if no errors
11. These bits are automatically reset at the end of a erase operation if no errors
11
11
Table
10
10
11. These bits are automatically reset at the end of a erase
B3S B2S
B1S B0S
RS
RS
9
9
FCR
FCR
RS
RS
8
8
7
7
Function
6
6
reserved
reserved
5
5
4
4
Internal Flash memory
3
3
Reset value: 0000h
Reset value: 0000h
2
2
B3F1 B3F0
B1F1 B1F0
RS
RS
1
1
33/239
RS
RS
0
0