ST10F276Z5 STMicroelectronics, ST10F276Z5 Datasheet - Page 214

• Manufacturer Part Number: ST10F276Z5
• Description: 16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
• Manufacturer: STMicroelectronics

Specifications of ST10F276Z5

• Single Voltage Supply: 5V ±10% (embedded regulator for 1.8 V core supply)

Electrical characteristics
23.8.19
214/239
Demultiplexed bus
V
ALE cycle time = 4 TCL + 2t
Table 107. Demultiplexed bus
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
5
6
80
81
12
13
14
15
16
17
18
20
21
22
24
26
28
28h
DD
= 5 V ±10%, V
CC ALE high time
CC Address setup to ALE
CC
CC
CC
CC
SR
SR
SR ALE low to valid data in
SR
SR
SR
SR
CC Data valid to WR
CC Data hold after WR
CC
CC
CC
Address/Unlatched CS
setup to RD, WR
(with RW-delay)
Address/Unlatched CS
setup to RD, WR
(no RW-delay)
RD, WR low time
RD, WR low time
RD to valid data in
RD to valid data in
Address/Unlatched CS
to valid data in
Data hold after RD
rising edge
Data float after RD
rising edge
(with RW-delay)
Data float after RD
rising edge (no RW-
delay)
ALE rising edge after
RD, WR
Address/Unlatched CS
hold after RD, WR
Address/Unlatched CS
hold after WRH
(with RW-delay)
(no RW-delay)
(with RW-delay)
(no RW-delay)
Parameter
1
SS
= 0 V, T
3(1)
(2)
A
A
+ t
= –40 to +125 °C, C
C
0.5 + 2t
15.5 + t
–10 + t
1.5 + t
– 5 + t
28 + t
10 + t
12.5 +
+ t
4 + t
4 + t
0 + t
Min.
2t
F
TCL = 12.5 ns
–
–
–
–
0
–
–
F
CPU
A
A
F
F
(50 ns at 40 MHz CPU clock without wait states).
C
C
A
F
F
C
A
= 40 MHz
17.5 + t
20 + 2t
18.5 + t
16.5 + t
6 + t
4 + t
Max.
t
t
–
–
–
–
–
–
–
–
–
–
–
–
C
C
C
F
A
A
C
F
L
+
+
= 50 pF,
2TCL – 9.5 + t
3TCL – 9.5 + t
2TCL – 15 + t
TCL – 12 + 2t
TCL – 8.5 + t
2TCL – 12.5 +
TCL – 8.5 + t
TCL – 11 + t
–10 + t
– 5 + t
0 + t
1/2 TCL = 1 to 64 MHz
Min.
2t
Variable CPU clock
–
–
–
–
0
–
–
A
F
F
F
A
A
F
C
A
C
C
4TCL – 30 + 2t
TCL – 8.5 + t
2TCL – 19 + t
3TCL – 19 + t
2TCL – 8.5 + t
3TCL – 20 + t
Max.
+ 2t
+ t
+ t
2t
–
–
–
–
–
–
–
–
–
–
–
–
ST10F276Z5
A
C
C
A
F
A
+
C
C
A
F
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns