ST10F276Z5 STMicroelectronics, ST10F276Z5 Datasheet - Page 141
ST10F276Z5
Manufacturer Part Number
ST10F276Z5
Description
16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
Manufacturer
STMicroelectronics
Datasheet
1.ST10F276Z5.pdf
(239 pages)
Specifications of ST10F276Z5
Single Voltage Supply
5V ±10% (embedded regulator for 1.8 V core supply)
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ST10F276Z5
22.3
Special function registers ordered by name
The following table lists in alphabetical order all SFRs which are implemented in the
ST10F276Z5.
Bit-addressable SFRs are marked with the letter “b” in column “Name”.
SFRs within the Extended SFR-Space (ESFRs) are marked with the letter “E” in column
“Physical Address”.
The system configuration is selected during reset. SYSCON reset value is 0000 0xx0 x000
0000b.
Reset Value depends on different triggered reset event.
The XPnIC Interrupt Control Registers control interrupt requests from integrated X-Bus
peripherals. Some software controlled interrupt requests may be generated by setting the
XPnIR bits (of XPnIC register) of the unused X-Peripheral nodes.
Table 68.
ADCIC b
ADCON b
ADDAT
ADDAT2
ADDRSEL1
ADDRSEL2
ADDRSEL3
ADDRSEL4
ADEIC b
BUSCON0 b FF0Ch
BUSCON1 b FF14h
BUSCON2 b FF16h
BUSCON3 b FF18h
BUSCON4 b FF1Ah
CAPREL
CC0
CC0IC b
CC1
CC10
CC10IC b
CC11
CC11IC b
Name
Special function registers ordered by address
FF98h
FFA0h
FEA0h
F0A0h E 50h
FE18h
FE1Ah
FE1Ch
FE1Eh
FF9Ah
FE4Ah
FE80h
FF78h
FE82h
FE94h
FF8Ch
FE96h
FF8Eh
Physical
address
CCh
D0h
50h
0Ch
0Dh
0Eh
0Fh
CDh
86h
8Ah
8Bh
8Ch
8Dh
25h
40h
BCh
41h
4Ah
C6h
4Bh
C7h
address
8-bit
A/D converter end of conversion interrupt control
register
A/D converter control register
A/D converter result register
A/D converter 2 result register
Address select register 1
Address select register 2
Address select register 3
Address select register 4
A/D converter overrun error interrupt control register - - 00h
Bus configuration register 0
Bus configuration register 1
Bus configuration register 2
Bus configuration register 3
Bus configuration register 4
GPT2 capture/reload register
CAPCOM register 0
CAPCOM register 0 interrupt control register
CAPCOM register 1
CAPCOM register 10
CAPCOM register 10 interrupt control register
CAPCOM register 11
CAPCOM register 11 interrupt control register
Description
Register set
- - 00h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0xx0h
0000h
0000h
0000h
0000h
0000h
0000h
- - 00h
0000h
0000h
- - 00h
0000h
- - 00h
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