ST7260E1 STMicroelectronics, ST7260E1 Datasheet - Page 87

• Manufacturer Part Number: ST7260E1
• Description: LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 8K FLASH/ROM AND SERIAL COMMUNICATION INTERFACE (SCI)
• Manufacturer: STMicroelectronics

Specifications of ST7260E1

• 4 Or 8 Kbytes Program Memory: high density Flash (HDFlash), or FastROM with readout and write protection

ST7260xx
13.3.5
Baud rate register (SCIBRR)
Table 41.
Table 42.
SCIBRR
7:6 SCP[1:0]
5:3 SCT[2:0]
2:0 SCR[2:0]
Bit
Address
(Hex.)
20
21
7
Name
SCP[1:0]
R/W
SCISR
Reset Value
SCIDR
Reset Value
SCIBRR register description
SCI register map and reset values
Register
Label
First SCI Prescaler
SCI Transmitter rate divisor
SCI Receiver rate divisor
6
These 2 prescaling bits allow several standard clock division ranges.
00: PR prescaling factor = 1
01: PR prescaling factor = 3
10: PR prescaling factor = 4
11: PR prescaling factor = 13
These 3 bits, in conjunction with the SCP1 and SCP0 bits, define the total division
applied to the bus clock to yield the transmit rate clock in conventional baud rate
generator mode.
000: TR dividing factor = 1
001: TR dividing factor = 2
010: TR dividing factor = 4
011: TR dividing factor = 8
100: TR dividing factor = 16
101: TR dividing factor = 32
110: TR dividing factor = 64
111: TR dividing factor = 128
These 3 bits, in conjunction with the SCP[1:0] bits, define the total division applied
to the bus clock to yield the receive rate clock in conventional baud rate generator
mode.
000: RR dividing factor = 1
001: RR dividing factor = 2
010: RR dividing factor = 4
011: RR dividing factor = 8
100: RR dividing factor = 16
101: RR dividing factor = 32
110: RR dividing factor = 64
111: RR dividing factor = 128
TDRE
DR7
7
1
x
5
DR6
TC
6
1
x
SCT[2:0]
R/W
4
RDRF
DR5
5
0
x
Function
Serial communications interface (SCI)
3
IDLE
DR4
4
0
x
DR3
OR
3
0
x
2
Reset value:
DR2
NF
2
0
x
SCR[2:0]
R/W
1
0000 0000 (00h)
DR1
FE
1
0
x
DR0
0
87/139
PE
0
0
x