ST72324BJ6 STMicroelectronics, ST72324BJ6 Datasheet - Page 85

• Manufacturer Part Number: ST72324BJ6
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324BJ6

• Hdflash Endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock Sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
• 4 Power Saving Modes: Slow, Wait, Active-halt, and Halt

ST72324Bxx
Note:
1
2
3
4
5
The OC1R register value required for a specific timing application can be calculated using
the following formula:
Where:
t
f
PRESC = Timer prescaler factor (2, 4 or 8 depending on the CC[1:0] bits; see
If the timer clock is an external clock the formula is:
Where:
t
f
When the value of the counter is equal to the value of the contents of the OC1R register, the
OLVL1 bit is output on the OCMP1 pin (see
The OCF1 bit cannot be set by hardware in one pulse mode but the OCF2 bit can generate
an Output Compare interrupt.
When the Pulse Width Modulation (PWM) and One Pulse Mode (OPM) bits are both set, the
PWM mode is the only active one.
If OLVL1 = OLVL2 a continuous signal will be seen on the OCMP1 pin.
The ICAP1 pin can not be used to perform input capture. The ICAP2 pin can be used to
perform input capture (ICF2 can be set and IC2R can be loaded) but the user must take
care that the counter is reset each time a valid edge occurs on the ICAP1 pin and ICF1 can
also generates interrupt if ICIE is set.
When one pulse mode is used OC1R is dedicated to this mode. Nevertheless OC2R and
OCF2 can be used to indicate a period of time has been elapsed but cannot generate an
output waveform because the level OLVL2 is dedicated to the one pulse mode.
Figure 47. One Pulse mode timing example
1. IEDG1 = 1, OC1R = 2ED0h, OLVL1 = 0, OLVL2 = 1
CPU
EXT
= Pulse period (in seconds)
= CPU clock frequnency (in hertz)
= Pulse period (in seconds)
= External timer clock frequency (in hertz)
Counter
OCMP1
ICAP1
IC1R
01F8
FFFC FFFD FFFE
OCiR = t
OCiR value =
OLVL2
*
f
EXT
Figure
t
- 5
PRESC
01F8
*
f
CPU
(1)
Compare1
2ED0 2ED1 2ED2
47).
- 5
OLVL1
2ED3
FFFC FFFD
2ED3
On-chip peripherals
OLVL2
Table
50)
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