ST72324BJ6 STMicroelectronics, ST72324BJ6 Datasheet - Page 130

• Manufacturer Part Number: ST72324BJ6
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324BJ6

• Hdflash Endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock Sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
• 4 Power Saving Modes: Slow, Wait, Active-halt, and Halt

On-chip peripherals
10.6.4
Note:
10.6.5
10.6.6
130/193
Changing the conversion channel
The application can change channels during conversion. When software modifies the
CH[3:0] bits in the ADCCSR register, the current conversion is stopped, the EOC bit is
cleared, and the A/D converter starts converting the newly selected channel.
Low power modes
The A/D converter may be disabled by resetting the ADON bit. This feature allows reduced
power consumption when no conversion is needed.
Table 70.
Interrupts
None.
ADC registers
ADC control/status register (ADCCSR)
Table 71.
ADCCSR
Bit
.
7
6
5
EOC
Mode
RO
Wait
Halt
7
SPEED
ADON
Name
EOC
Effect of low power modes on ADC
ADCCSR register description
SPEED
No effect on A/D converter.
A/D converter disabled.
After wakeup from Halt mode, the A/D converter requires a stabilization time t
(see
performed.
End of Conversion
ADC clock selection
A/D Converter on
R/W
This bit is set by hardware. It is cleared by hardware when software reads the
ADCDRH register or writes to any bit of the ADCCSR register.
0: Conversion is not complete
1: Conversion complete
This bit is set and cleared by software.
0: f
1: f
This bit is set and cleared by software.
0: Disable ADC and stop conversion
1: Enable ADC and start conversion
6
Section 12: Electrical
ADC
ADC
= f
= f
ADON
CPU
CPU
RW
5
/4
/2
Reserved
characteristics) before accurate conversions can be
4
-
Description
Function
3
2
Reset value: 0000 0000 (00h)
CH[3:0]
RW
1
ST72324Bxx
STAB
0