ST72324BJ6 STMicroelectronics, ST72324BJ6 Datasheet - Page 170

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ST72324BJ6

Manufacturer Part Number
ST72324BJ6
Description
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324BJ6

Hdflash Endurance
1 kcycle at 55 °C, data retention 40 years at 85 °C
Clock Sources
crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
4 Power Saving Modes
Slow, Wait, Active-halt, and Halt
Electrical characteristics
12.13.1
12.13.2
170/193
Analog power supply and reference pins
Depending on the MCU pin count, the package may feature separate V
analog power supply pins. These pins supply power to the A/D converter cell and function
as the high and low reference voltages for the conversion. In some packages, V
V
and reference pads are internally bonded to the V
Separation of the digital and analog power pins allow board designers to improve A/D
performance. Conversion accuracy can be impacted by voltage drops and noise in the event
of heavily loaded or badly decoupled power supply lines (see
design
General PCB design guidelines
To obtain best results, some general design and layout rules should be followed when
designing the application PCB to shield the noise-sensitive, analog physical interface from
noise-generating CMOS logic signals.
Figure 87. Power supply filtering
SSA
Use separate digital and analog planes. The analog ground plane should be connected
to the digital ground plane via a single point on the PCB.
Filter power to the analog power planes. It is recommended to connect capacitors, with
good high frequency characteristics, between the power and ground lines, placing
0.1µF and optionally, if needed 10 pF capacitors as close as possible to the ST7 power
supply pins and a 1 to 10 µF capacitor close to the power source (see
The analog and digital power supplies should be connected in a star network. Do not
use a resistor, as V
resistance would cause a voltage drop and a loss of accuracy.
Properly place components and route the signal traces on the PCB to shield the analog
inputs. Analog signals paths should run over the analog ground plane and be as short
as possible. Isolate analog signals from digital signals that may switch while the analog
inputs are being sampled by the A/D converter. Do not toggle digital outputs on the
same I/O port as the A/D input being converted.
pins are not available (refer to
guidelines).
AREF
Power
supply
source
V
DD
is used as a reference voltage by the A/D converter and any
1 to 10 µF
ST7
digital noise
filtering
Section 2 on page
External
noise
filtering
DD
0.1 µF
and V
0.1 µF
15). In this case the analog supply
SS
V
V
V
V
Section 12.13.2: General PCB
AREF
SS
DD
SSA
pins.
ST72XXX
AREF
Figure
and V
ST72324Bxx
AREF
87).
SSA
and

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