LPC2468 NXP Semiconductors, LPC2468 Datasheet - Page 16

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LPC2468

Manufacturer Part Number
LPC2468
Description
NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer
NXP Semiconductors
Datasheet

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Table 4.
LPC2468
Product data sheet
Symbol
P2[11]/EINT1/
MCIDAT1/
I2STX_CLK
P2[12]/EINT2/
MCIDAT2/
I2STX_WS
P2[13]/EINT3/
MCIDAT3/
I2STX_SDA
P2[14]/CS2/
CAP2[0]/SDA1
P2[15]/CS3/
CAP2[1]/SCL1
P2[16]/CAS
P2[17]/RAS
P2[18]/
CLKOUT0
P2[19]/
CLKOUT1
P2[20]/DYCS0
P2[21]/DYCS1
P2[22]/DYCS2/
CAP3[0]/SCK0
Pin description
Pin
108
106
102
91
99
87
95
59
67
73
81
85
[6]
[6]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[6]
[6]
[6]
…continued
Ball
T17
N14
T16
R12
P13
R11
R13
U3
R7
T8
U11
U12
[1]
[1]
[1]
[6]
[6]
[6]
[1]
[1]
[6]
[6]
[1]
[1]
All information provided in this document is subject to legal disclaimers.
Type
I/O
I
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I/O
I/O
I/O
O
I
I/O
I/O
O
I
I/O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I
I/O
Rev. 6.1 — 6 September 2011
Description
P2[11] — General purpose digital input/output pin.
EINT1 — External interrupt 1 input.
MCIDAT1 — Data line 1 for SD/MMC interface.
I2STX_CLK — Transmit Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the I
P2[12] — General purpose digital input/output pin.
EINT2 — External interrupt 2 input.
MCIDAT2 — Data line 2 for SD/MMC interface.
I2STX_WS — Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
specification.
P2[13] — General purpose digital input/output pin.
EINT3 — External interrupt 3 input.
MCIDAT3 — Data line 3 for SD/MMC interface.
I2STX_SDA — Transmit data. It is driven by the transmitter and read by
the receiver. Corresponds to the signal SD in the I
P2[14] — General purpose digital input/output pin.
CS2 — LOW active Chip Select 2 signal.
CAP2[0] — Capture input for Timer 2, channel 0.
SDA1 — I
P2[15] — General purpose digital input/output pin.
CS3 — LOW active Chip Select 3 signal.
CAP2[1] — Capture input for Timer 2, channel 1.
SCL1 — I
P2[16] — General purpose digital input/output pin.
CAS — LOW active SDRAM Column Address Strobe.
P2[17] — General purpose digital input/output pin.
RAS — LOW active SDRAM Row Address Strobe.
P2[18] — General purpose digital input/output pin.
CLKOUT0 — SDRAM clock 0.
P2[19] — General purpose digital input/output pin.
CLKOUT1 — SDRAM clock 1.
P2[20] — General purpose digital input/output pin.
DYCS0 — SDRAM chip select 0.
P2[21] — General purpose digital input/output pin.
DYCS1 — SDRAM chip select 1.
P2[22] — General purpose digital input/output pin.
DYCS2 — SDRAM chip select 2.
CAP3[0] — Capture input for Timer 3, channel 0.
SCK0 — Serial clock for SSP0.
2
2
C1 clock input/output (this is not an open-drain pin).
C1 data input/output (this is not an open-drain pin).
Single-chip 16-bit/32-bit micro
2
S-bus specification.
2
S-bus specification.
LPC2468
© NXP B.V. 2011. All rights reserved.
2
S-bus
16 of 85

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