LPC2212_2214 NXP Semiconductors, LPC2212_2214 Datasheet - Page 39

The LPC2212/2214 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulationand embedded trace support, together with 128/256 kB of embedded high-speed flashmemory

LPC2212_2214

Manufacturer Part Number
LPC2212_2214
Description
The LPC2212/2214 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulationand embedded trace support, together with 128/256 kB of embedded high-speed flashmemory
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 10.
C
[1]
[2]
[3]
[4]
[5]
Table 11.
[1]
LPC2212_2214
Product data sheet
Symbol
t
t
t
t
t
t
t
Access cycle
standard read
standard write
burst read - initial
burst read - subsequent 3
BLSHDNV
CHDV
CHWEL
CHBLSL
CHWEH
CHBLSH
CHDNV
L
= 25 pF; T
Except on initial access, in which case the address is set up T
T
Latest of address valid, CS LOW, OE LOW to data valid.
Address valid to data valid.
Earliest of CS HIGH, OE HIGH, address change to data invalid.
See the LPC2114/2124/2212/2214 User Manual for a description of the WSTn bits.
cy(CCLK)
External memory interface dynamic characteristics
Parameter
BLS HIGH to data invalid
time
XCLK HIGH to data valid
time
XCLK HIGH to WE LOW
time
XCLK HIGH to BLS LOW
time
XCLK HIGH to WE HIGH
time
XCLK HIGH to BLS HIGH
time
XCLK HIGH to data invalid
time
Standard read access specifications
=
amb
1
CCLK.
= 40
C.
Max frequency
f
f
f
MAX
f
MAX
MAX
MAX
------------------------------- -
t
-------------------------------- -
t
--------------------------------- -
t
RAM
------------------------------- -
t
ROM
WRITE
2
INIT
2
1
+
All information provided in this document is subject to legal disclaimers.
+
Conditions
+
WST1
+
WST1
+
+
WST2
1
20 ns
+
20 ns
20 ns
5 ns
Rev. 5 — 14 June 2011
WST
WST  0; round up to
integer
N/A
WST1
WST2
WST1
cy(CCLK)
[2]
[1]
Min
(2  T
-
-
-
-
-
-
setting
t
------------------------------- -
t
-------------------------------------------
t
------------------------------- -
RAM
WRITE
INIT
t
t
earlier.
cy CCLK
cy CCLK
…continued
t
cy CCLK
cy(CCLK)
+
+
20 ns
20 ns
Single-chip 16/32-bit ARM microcontrollers
t
CYC
)  5
+
2
2
5
Memory access time requirement
t
t
t
t
RAM
WRITE
INIT
ROM
LPC2212/2214
t
t
t
cy CCLK
Typ Max
-
-
-
-
-
-
-
cy CCLK
cy CCLK
t
cy CCLK
(2  T
10
10
10
10
10
10
20 ns
© NXP B.V. 2011. All rights reserved.
2
2
cy(CCLK)
+
+
1
WST1
WST1
+
WST2
) + 5 ns
39 of 47
20 ns
20 ns
Unit
ns
ns
ns
ns
ns
ns
5 ns

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