LPC2212_2214 NXP Semiconductors, LPC2212_2214 Datasheet - Page 38

• Manufacturer Part Number: LPC2212_2214
• Description: The LPC2212/2214 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulationand embedded trace support, together with 128/256 kB of embedded high-speed flashmemory
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 10.
C
LPC2212_2214
Product data sheet
Symbol
Common to read and write cycles
t
t
t
t
Read cycle parameters
t
t
t
t
t
t
t
t
t
t
t
Write cycle parameters
t
t
t
t
t
t
t
t
t
t
t
CHAV
CHCSL
CHCSH
CHANV
CSLAV
OELAV
CSLOEL
am
am(ibr)
am(sbr)
h(D)
CSHOEH
OEHANV
CHOEL
CHOEH
AVCSL
CSLDV
CSLWEL
CSLBLSL
WELDV
CSLDV
WELWEH
BLSLBLSH
WEHANV
WEHDNV
BLSHANV
L
= 25 pF; T
External memory interface dynamic characteristics
Parameter
XCLK HIGH to address valid
time
XCLK HIGH to CS LOW time
XCLK HIGH to CS HIGH
time
XCLK HIGH to address
invalid time
CS LOW to address valid
time
OE LOW to address valid
time
CS LOW to OE LOW time
memory access time
memory access time (initial
burst-ROM)
memory access time
(subsequent burst-ROM)
data input hold time
CS HIGH to OE HIGH time
OE HIGH to address invalid
time
XCLK HIGH to OE LOW time
XCLK HIGH to OE HIGH
time
address valid to CS LOW
time
CS LOW to data valid time
CS LOW to WE LOW time
CS LOW to BLS LOW time
WE LOW to data valid time
CS LOW to data valid time
WE LOW to WE HIGH time
BLS LOW to BLS HIGH time
WE HIGH to address invalid
time
WE HIGH to data invalid time
BLS HIGH to address invalid
time
amb
= 40

C.
All information provided in this document is subject to legal disclaimers.
Conditions
Rev. 5 — 14 June 2011
[2][3]
[2][3]
[2][4]
[1]
[1]
[5]
[1]
[2]
[2]
[2]
[2]
[2]
Min
-
-
-
-
5
5
5
(T
(20)
(T
(20)
T
0
5
5
5
5
T
5
5
5
5
5
T
T
T
(2  T
T
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
Single-chip 16/32-bit ARM microcontrollers
+ (20)
 10
 (1 + WST2)  5
 (1 + WST2)  5
 5
 5
 (2 + WST1)) +
 (2 + WST1)) +
)  5
LPC2212/2214
Typ Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
10
10
10
10
+10
+10
+5
-
-
-
-
+5
+5
+5
+5
-
+5
+5
+5
+5
+5
T
WST2) + 5
T
(1 + WST2) + 5
T
(2  T
T
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
© NXP B.V. 2011. All rights reserved.
cy(CCLK)
 (1 +

+ 5
+ 5
) + 5 ns
38 of 47
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns