CS8416-CNZ Cirrus Logic Inc, CS8416-CNZ Datasheet - Page 33

• Manufacturer Part Number: CS8416-CNZ
• Description: IC RCVR DGTL 192KHZ 28QFN COMM
• Manufacturer: Cirrus Logic Inc
• Type: Digital Audio Interface Receiverr

Specifications of CS8416-CNZ

• Applications: Digital Audio
• Mounting Type: Surface Mount
• Package / Case: 28-QFN
• Audio Control Type: Digital
• Control Interface: I2C, SPI
• Control / Process Application: AV & DVD Receivers, CD-R, Digital Mixing Consoles
• Supply Voltage Range: 3.13V To 5.25V, 3.13V To 3.46V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1017 - BOARD EVAL FOR CS8416 RCVR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1723

DS578F3
12.CONTROL PORT DESCRIPTION
The control port is used to access the registers, allowing the CS8416 to be configured for the desired operational
modes and formats. The operation of the control port may be completely asynchronous with respect to the audio
sample rates. However, to avoid potential interference problems, the control port pins should remain static if no op-
eration is required.
The control port has 2 modes: SPI and I²C, with the CS8416 acting as a slave device. SPI Mode is selected if there
is a high to low transition on the AD0/CS pin, after the RST pin has been brought high. I²C Mode is selected by con-
necting the AD0/CS pin through a resistor to VL or DGND, thereby permanently selecting the desired AD0 bit ad-
dress state.
12.1
C C L K
CS
C D IN
C D O U T
SPI Mode
In SPI Mode, CS is the CS8416 chip select signal, CCLK is the control port bit clock (input into the CS8416
from the microcontroller), CDIN is the input data line from the microcontroller, CDOUT is the output data line
to the microcontroller. Data is clocked in on the rising edge of CCLK and out on the falling edge.
Figure 11
seven bits on CDIN form the chip address and must be 0010000. The eighth bit is a read/write indicator
(R/W), which should be low to write. The next eight bits include the 7-bit Memory Address Pointer (MAP),
which is set to the address of the register that is to be updated. The next eight bits are the data which will
be placed into the register designated by the MAP. During writes, the CDOUT output stays in the Hi-Z state.
It may be externally pulled high or low with a 47 k Ω resistor, if desired.
To read a register, the MAP has to be set to the correct address by executing a partial write cycle which
finishes (CS high) immediately after the MAP byte. To begin a read, bring CS low, send out the chip address
and set the read/write bit (R/W) high. The next falling edge of CCLK will clock out the MSB of the addressed
register (CDOUT will leave the high impedance state). The MAP automatically increments, so data for suc-
cessive registers will appear consecutively.
ADDRESS
MAP = Memory Address Pointer, 8 bits, MSB first
0010000
C H IP
shows the operation of the control port in SPI Mode. To write to a register, bring CS low. The first
High Impedance
R/W
M A P
Figure 11. Control Port Timing in SPI Mode
MSB
b y te 1
DATA
b y te n
LSB
A D D R E S S
C H IP
0010000
R/W
MSB
LSB MSB
CS8416
LSB
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