SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 182
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SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G20 PDF datasheet #4
- SAM9G20 PDF datasheet #5
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- Download datasheet (2Mb)
Debug Support
11.1
11.1.1
11.1.2
11-2
About debug support
Debug clocks
Scan chain 15
Debug support is implemented by using the ARM9EJ-S core embedded within the
ARM926EJ-S processor. Full details of the debug support provided by the ARM9EJ-S
core are described in the ARM9EJ-S Technical Reference Manual.
Debug support for the ARM926EJ-S memory system is implemented by extending the
debug facilities providing access to CP15 using an ARM9EJ-S external scan chain (scan
chain 15). This scan chain is external to the ARM9EJ-S core but internal to the
ARM926EJ-S processor.
The system and test clocks must be synchronized externally to the ARM926EJ-S
macrocell. To synchronize off-chip debug clocking with the ARM926EJ-S macrocell
requires a three-state synchronizer. This is described in the debug chapter of the
ARM9EJ-S Technical Reference Manual.
Scan chain 15 enables access to the CP15 registers. Scan chain 15 is 48 bits long.
Table 11-1 shows the bit assignments for scan chain 15.
With scan chain 15 selected, TDI is connected to bit 47 and TDO is connected to bit 0.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Bits
[47]
[46:33]
[32]
[31:0]
Table 11-1 Scan chain 15 format
Write, not read (W/R)
Register address
Initiate access/access complete
When written:
1 = initiate new access
0 = NOP
When read:
1 = access complete
0 = access incomplete
Data value
Function
ARM DDI0198D
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