M55800A Atmel Corporation, M55800A Datasheet - Page 190
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M55800A
Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.M55800A.pdf
(29 pages)
4.M55800A.pdf
(256 pages)
5.M55800A.pdf
(28 pages)
Specifications of M55800A
Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
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- M55800A PDF datasheet #3
- M55800A PDF datasheet #4
- M55800A PDF datasheet #5
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- Download datasheet (5Mb)
20. SPI: Serial Peripheral Interface
20.1
190
Pin Description
AT91M5880A
The AT91M55800A includes an SPI which provides communication with external devices in
master or slave mode.
The SPI has four external chip selects which can be connected to up to 15 devices. The data
length is programmable, from 8- to 16-bit.
As for the USART, a 2-channel PDC can be used to move data between memory and the SPI
without CPU intervention.
Seven pins are associated with the SPI Interface. When not needed for the SPI function, each of
these pins can be configured as a PIO.
Support for an external master is provided by the PIO Controller Multi-driver option. To configure
an SPI pin as open-drain to support external drivers, set the corresponding bits in the
PIO_MDSR register.
An input filter can be enabled on the SPI input pins by setting the corresponding bits in the
PIO_IFSR.
The NPCS0/NSS pin can function as a peripheral chip select output or slave select input. Refer
to
Figure 20-1. SPI Block Diagram
Table 20-1
APB
for a description of the SPI pins.
MCK
MCK/32
Serial Peripheral Interface
Interrupt Controller
Advanced
INT
NPCS0/NSS
NPCS1
NPCS2
NPCS3
SPCK
MISO
MOSI
Parallel IO
Controller
NPCS0/NSS
1745F–ATARM–06-Sep-07
NPCS1
NPCS2
NPCS3
SPCK
MISO
MOSI
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