M55800A Atmel Corporation, M55800A Datasheet - Page 165

• Manufacturer Part Number: M55800A
• Manufacturer: Atmel Corporation

Specifications of M55800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 176
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 58
• Ext Interrupts: 58
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 72
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

19.2
19.2.1
19.2.2
1745F–ATARM–06-Sep-07
Timer Counter Description
Counter
Clock Selection
Each Timer Counter channel is identical in operation. The registers for channel programming are
listed in
Each Timer Counter channel is organized around a 16-bit counter. The value of the counter is
incremented at each positive edge of the input clock. When the counter reaches the value
0xFFFF and passes to 0x0000, an overflow occurs and the bit COVFS in TC_SR (Status Regis-
ter) is set.
The current value of the counter is accessible in real-time by reading TC_CV. The counter can
be reset by a trigger. In this case, the counter value passes to 0x0000 on the next valid edge of
the clock.
At block level, input clock signals of each channel can either be connected to the external inputs
TCLK0, TCLK1 or TCLK2, or be connected to the configurable I/O signals TIOA0, TIOA1 or
TIOA2 for chaining by programming the TC_BMR (Block Mode).
Each channel can independently select an internal or external clock source for its counter:
The selected clock can be inverted with the CLKI bit in TC_CMR (Channel Mode). This allows
counting on the opposite edges of the clock.
The burst function allows the clock to be validated when an external signal is high. The BURST
parameter in the Mode Register defines this signal (none, XC0, XC1, XC2).
Note:
Figure 19-2. Clock Selection
• Internal clock signals: MCK/2, MCK/8, MCK/32, MCK/128, MCK/1024
• External clock signals: XC0, XC1 or XC2
In all cases, if an external clock is used, the duration of each of its levels must be longer than the
system clock (MCK) period. The external clock frequency must be at least 2.5 times lower than the
system clock.
Table 19-1 on page
MCK/2
MCK/8
MCK/32
MCK/128
MCK/1024
XC0
XC1
XC2
164.
1
CLKS
BURST
CLKI
Selected
Clock
AT91M5880A
165