M42800A Atmel Corporation, M42800A Datasheet - Page 270

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug in Depth
B.17
B.17.1 Breakpoint and watchpoint coupling example
B-52
Coupling breakpoints and watchpoints
You can couple watchpoint units 1 and 0 together using the CHAIN and RANGE
inputs. Using CHAIN enables Watchpoint 0 to be triggered only if Watchpoint 1 has
previously matched. The use of RANGE enables simple range checking to be
performed by combining the outputs of both watchpoints.
Let:
CHAINOUT signal
The CHAINOUT signal is derived as follows:
The CHAINOUT output of watchpoint register 1 provides the CHAIN input to
Watchpoint 0. This CHAIN input enables for quite complicated configurations of
breakpoints and watchpoints.
There is no CHAIN input to Watchpoint 1 and no CHAIN output from Watchpoint 0.
Take, for example, the request by a debugger to breakpoint on the instruction at location
YYY when running process XXX in a multi process system. If the current process ID
is stored in memory, you can implement the above function with a watchpoint and
breakpoint chained together. The watchpoint address points to a known memory
location containing the current process ID, the watchpoint data points to the required
process ID and the ENABLE bit is set to off.
Note
Copyright © 1994-2001. All rights reserved.
be the value in the address value register
be the value in the address mask register
be the address bus from the ARM7TDMI core
be the value in the data value register
be the value in the data mask register
be the data bus from the ARM7TDMI core
be the value in the control value register
be the value in the control mask register
be the combined control bus from the ARM7TDMI core, other
watchpoint registers and the EXTERN signal.
ARM DDI 0029G