ATxmega64A3 Atmel Corporation, ATxmega64A3 Datasheet - Page 68

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ATxmega64A3

Manufacturer Part Number
ATxmega64A3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8077H–AVR–12/09
Figure 6-3.
Having eight multiplexers means that it is possible to route up to eight events at the same time.
It is also possible to route one event through several multiplexers.
Not all XMEGA parts contain all peripherals. This only means that peripheral is not available for
generating or using events. The network configuration itself is compatible between all devices.
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
Event Routing Network
(PORTC)
(PORTD)
(PORTE)
(PORTF)
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
ADCA
ADCB
DACA
DACB
TCC0
TCC1
TCD0
TCD1
TCE0
TCE1
TCF0
TCF1
AC0
AC1
AC2
AC3
RTC
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(4)
(4)
(8)
(8)
(8)
(8)
(8)
(8)
Event Channel 7
Event Channel 6
Event Channel 5
Event Channel 4
Event Channel 3
Event Channel 2
Event Channel 1
Event Channel 0
(16)
(16)
(16)
(16)
(13)
(48)
XMEGA A
CH0CTRL[7:0]
CH1CTRL[7:0]
CH2CTRL[7:0]
CH3CTRL[7:0]
CH4CTRL[7:0]
CH5CTRL[7:0]
CH6CTRL[7:0]
CH7CTRL[7:0]
CH0MUX[7:0]
CH1MUX[7:0]
CH2MUX[7:0]
CH3MUX[7:0]
CH4MUX[7:0]
CH5MUX[7:0]
CH6MUX[7:0]
CH7MUX[7:0]
68

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