ATxmega64A3 Atmel Corporation, ATxmega64A3 Datasheet - Page 176

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ATxmega64A3

Manufacturer Part Number
ATxmega64A3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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15. AWeX – Advanced Waveform Extension
15.1
15.2
8077H–AVR–12/09
Features
Overview
The Advanced Waveform Extention (AWeX) provides extra features to the Timer/Counter in
Waveform Generation (WG) modes. The AWeX enables easy and robust implementation of
advanced motor control (AC, BLDC, SR, and Stepper) and power control applications.
Figure 15-1. Advanced Waveform eXtention and closely related peripherals (grey)
As shown in
Timer/Counter 0 are split into a complimentary pair of outputs when any AWeX features is
enabled. These output pairs go through a Dead-Time Insertion (DTI) unit that enables genera-
tion of the non-inverted Low Side (LS) and inverted High Side (HS) of the WG output with dead
time insertion between LS and HS switching. The DTI output will override the normal port value
according to the port override setting. Optionally the final output can be inverted by using the
invert I/O (INVEN) bit setting for the port pin (Pxn).
4 Dead-Time Insertion (DTI) Units (8-pin)
Event Controlled Fault Protection
Single Channel Multiple Output Operation (for BLDC control)
Double Buffered Pattern Generation
The Hi-Resolution Timer Extension Increases PWM/FRQ Resolution by 2-bits (4x)
Timer/Counter 0
– 8-bit Resolution
– Separate High and Low Side Dead-Time Setting
– Double Buffered Dead-Time
– Halts Timer During Dead-Time (Optional)
Channel A
Channel B
Channel C
Channel D
System
Event
WG
WG
WG
WG
Figure 15-1 on page 176
AWeX
Generation
Channel A
Channel B
Channel C
Channel D
Protection
Pattern
Fault
DTI
DTI
DTI
DTI
each of the waveform generator outputs from the
Override
Port
PORTx
INVEN
INVEN
INVEN
INVEN
INVEN
INVEN
INVEN
INVEN
XMEGA A
Px0
Px1
Px2
Px3
Px4
Px5
Px6
Px7
176

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