ATmega8 Atmel Corporation, ATmega8 Datasheet - Page 97

• Manufacturer Part Number: ATmega8
• Manufacturer: Atmel Corporation

Specifications of ATmega8

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 39. Waveform Generation Mode Bit Description
2486Z–AVR–02/11
Mode
0
1
2
3
4
5
6
WGM13
0
0
0
0
0
0
0
WGM12
(CTC1)
0
0
0
0
1
1
1
Table 38
rect or the phase and frequency correct, PWM mode.
Table 38. Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM
Note:
• Bit 3 – FOC1A: Force Output Compare for channel A
• Bit 2 – FOC1B: Force Output Compare for channel B
The FOC1A/FOC1B bits are only active when the WGM13:0 bits specifies a non-PWM mode.
However, for ensuring compatibility with future devices, these bits must be set to zero when
TCCR1A is written when operating in a PWM mode. When writing a logical one to the
FOC1A/FOC1B bit, an immediate Compare Match is forced on the waveform generation unit.
The OC1A/OC1B output is changed according to its COM1x1:0 bits setting. Note that the
FOC1A/FOC1B bits are implemented as strobes. Therefore it is the value present in the
COM1x1:0 bits that determine the effect of the forced compare.
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer
on Compare Match (CTC) mode using OCR1A as TOP.
The FOC1A/FOC1B bits are always read as zero.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes (see
COM1A1/
COM1B1
(PWM11)
WGM11
0
0
1
1
0
0
1
1
0
0
1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. See
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase cor-
“Phase Correct PWM Mode” on page 90
(PWM10)
COM1A0/
COM1B0
WGM10
0
1
0
1
0
1
0
0
1
0
1
Timer/Counter Mode of
Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13:0 = 9 or 14: Toggle OC1A on Compare Match, OC1B
disconnected (normal port operation). For all other WGM1
settings, normal port operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match when up-counting. Set
OC1A/OC1B on Compare Match when downcounting.
Set OC1A/OC1B on Compare Match when up-counting. Clear
OC1A/OC1B on Compare Match when downcounting.
Table
(1)
39. Modes of operation supported by the Timer/Counter
“Modes of Operation” on page
for more details
OCR1A
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
0x00FF
0x01FF
Update of
OCR1
Immediate
TOP
TOP
TOP
Immediate
BOTTOM
BOTTOM
ATmega8(L)
x
87).
TOV1 Flag
Set on
MAX
BOTTOM
MAX
TOP
TOP
BOTTOM
BOTTOM
(1)
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