ATmega8 Atmel Corporation, ATmega8 Datasheet - Page 57

• Manufacturer Part Number: ATmega8
• Manufacturer: Atmel Corporation

Specifications of ATmega8

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2486Z–AVR–02/11
Table 21
ure 25 on page 56
internally in the modules having the alternate function.
Table 21. Generic Description of Overriding Signals for Alternate Functions
The following subsections shortly describe the alternate functions for each port, and relate the
overriding signals to the alternate function. Refer to the alternate function description for further
details.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
summarizes the function of the overriding signals. The pin and port indexes from
Full Name
Pull-up Override
Enable
Pull-up Override
Value
Data Direction
Override Enable
Data Direction
Override Value
Port Value
Override Enable
Port Value
Override Value
Digital Input Enable
Override Enable
Digital Input Enable
Override Value
Digital Input
Analog Input/output
are not shown in the succeeding tables. The overriding signals are generated
Description
If this signal is set, the pull-up enable is controlled by
the PUOV signal. If this signal is cleared, the pull-up is
enabled when {DDxn, PORTxn, PUD} = 0b010.
If PUOE is set, the pull-up is enabled/disabled when
PUOV is set/cleared, regardless of the setting of the
DDxn, PORTxn, and PUD Register bits.
If this signal is set, the Output Driver Enable is
controlled by the DDOV signal. If this signal is cleared,
the Output driver is enabled by the DDxn Register bit.
If DDOE is set, the Output Driver is enabled/disabled
when DDOV is set/cleared, regardless of the setting of
the DDxn Register bit.
If this signal is set and the Output Driver is enabled,
the port value is controlled by the PVOV signal. If
PVOE is cleared, and the Output Driver is enabled, the
port Value is controlled by the PORTxn Register bit.
If PVOE is set, the port value is set to PVOV,
regardless of the setting of the PORTxn Register bit.
If this bit is set, the Digital Input Enable is controlled by
the DIEOV signal. If this signal is cleared, the Digital
Input Enable is determined by MCU-state (Normal
mode, sleep modes).
If DIEOE is set, the Digital Input is enabled/disabled
when DIEOV is set/cleared, regardless of the MCU
state (Normal mode, sleep modes).
This is the Digital Input to alternate functions. In the
figure, the signal is connected to the output of the
schmitt trigger but before the synchronizer. Unless the
Digital Input is used as a clock source, the module with
the alternate function will use its own synchronizer.
This is the Analog Input/output to/from alternate
functions. The signal is connected directly to the pad,
and can be used bi-directionally.
ATmega8(L)
Fig-
57