ATmega8 Atmel Corporation, ATmega8 Datasheet - Page 69

• Manufacturer Part Number: ATmega8
• Manufacturer: Atmel Corporation

Specifications of ATmega8

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8-bit
Timer/Counter0
Overview
Registers
Definitions
2486Z–AVR–02/11
Timer/Counter0 is a general purpose, single channel, 8-bit Timer/Counter module. The main
features are:
•
•
•
•
A simplified block diagram of the 8-bit Timer/Counter is shown in
ment of I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
Figure 26. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) is an 8-bit register. Interrupt request (abbreviated to Int. Req. in the
figure) signals are all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individ-
ually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in
the figure since these registers are shared by other timer units.
The Timer/Counter can be clocked internally or via the prescaler, or by an external clock source
on the T0 pin. The Clock Select logic block controls which clock source and edge the
Timer/Counter uses to increment its value. The Timer/Counter is inactive when no clock source
is selected. The output from the clock select logic is referred to as the timer clock (clk
Many register and bit references in this document are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. However, when using the register or bit
defines in a program, the precise form must be used, that is, TCNT0 for accessing
Timer/Counter0 counter value and so on.
The definitions in
Table 33. Definitions
BOTTOM
MAX
Single Channel Counter
Frequency Generator
External Event Counter
10-bit Clock Prescaler
The counter reaches the BOTTOM when it becomes 0x00
The counter reaches its MAXimum when it becomes 0xFF (decimal 255)
Table 33
Timer/Counter
TCNTn
“8-bit Timer/Counter Register Description” on page
count
are also used extensively throughout this datasheet.
“Pin Configurations” on page
Control Logic
=
TCCRn
0xFF
clk
Tn
2. CPU accessible I/O Registers,
( From Prescaler )
Figure
Clock Select
Detector
Edge
26. For the actual place-
ATmega8(L)
71.
TOVn
(Int.Req.)
Tn
T0
).
69