ATmega32A Atmel Corporation, ATmega32A Datasheet - Page 246

• Manufacturer Part Number: ATmega32A
• Manufacturer: Atmel Corporation

Specifications of ATmega32A

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8155C–AVR–02/11
If the ADC is not to be used during scan, the recommended input values from
be used. The user is recommended not to use the Differential Gain stages during scan. Switch-
cap based gain stages require fast operation and accurate timing which is difficult to obtain
when used in a scan chain. Details concerning operations of the differential gain stage is there-
fore not provided.
The AVR ADC is based on the analog circuitry shown in
imation algorithm implemented in the digital logic. When used in Boundary-scan, the problem is
usually to ensure that an applied analog voltage is measured within some limits. This can easily
be done without running a successive approximation algorithm: apply the lower limit on the digi-
tal DAC[9:0] lines, make sure the output from the comparator is low, then apply the upper limit
on the digital DAC[9:0] lines, and verify the output from the comparator to be high.
The ADC need not be used for pure connectivity testing, since all analog inputs are shared with
a digital port pin as well.
When using the ADC, remember the following:
As an example, consider the task of verifying a 1.5V ±5% input signal at ADC channel 3 when
the power supply is 5.0V and AREF is externally connected to V
The recommended values from
rithm in
“Actions” describes what JTAG instruction to be used before filling the Boundary-scan Register
with the succeeding columns. The verification should be done on the data scanned out when
scanning in the data on the same row in the table.
• The Port Pin for the ADC channel in use must be configured to be an input with pull-up
• In Normal mode, a dummy conversion (consisting of 10 comparisons) is performed when
• The DAC values must be stable at the midpoint value 0x200 when having the HOLD signal
disabled to avoid signal contention.
enabling the ADC. The user is advised to wait at least 200 ns after enabling the ADC before
controlling/observing any ADC signal, or perform a dummy conversion before using the first
result.
low (Sample mode).
Table
24-6. Only the DAC and Port Pin values of the Scan-chain are shown. The column
The lower limit is:
The upper limit is:
Table 24-5
1024 1.5V 0,95 5V
1024 1.5V 1.05 5V
⋅
are used unless other values are given in the algo-
⋅
⋅
⋅
⁄
⁄
Figure 24-10
=
=
291
323
CC
.
=
=
0x123
0x143
with a successive approx-
ATmega32A
Table 24-5
should
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