ATmega32A Atmel Corporation, ATmega32A Datasheet - Page 112

• Manufacturer Part Number: ATmega32A
• Manufacturer: Atmel Corporation

Specifications of ATmega32A

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

16.10 Register Description
16.10.1
8155C–AVR–02/11
TCCR1A – Timer/Counter1 Control Register A
Figure 16-13. Timer/Counter Timing Diagram, with Prescaler (f
• Bit 7:6 – COM1A1:0: Compare Output Mode for Compare unit A
• Bit 5:4 – COM1B1:0: Compare Output Mode for Compare unit B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a normal or a CTC mode (non-PWM).
Table 16-2.
Bit
Read/Write
Initial Value
COM1A1/COM1B1
(PC and PFC PWM)
and ICFn
(CTC and FPWM)
TOVn
(Update at TOP)
TCNTn
TCNTn
OCRnx
as TOP)
(clk
clk
clk
0
0
1
1
I/O
(FPWM)
I/O
Tn
/8)
(if used
COM1A1
Compare Output Mode, non-PWM
R/W
7
0
COM1A0
R/W
6
0
COM1A0/COM1B0
TOP - 1
TOP - 1
COM1B1
Old OCRnx Value
R/W
0
1
0
1
Table 16-2
5
0
COM1B0
R/W
4
0
shows the COM1x1:0 bit functionality when the
Description
Normal port operation, OC1A/OC1B disconnected.
Toggle OC1A/OC1B on compare match
Clear OC1A/OC1B on compare match (Set output
to low level)
Set OC1A/OC1B on compare match (Set output to
high level)
TOP
TOP
FOC1A
W
3
0
FOC1B
W
clk_I/O
2
0
BOTTOM
TOP - 1
/8)
New OCRnx Value
WGM11
R/W
1
0
ATmega32A
WGM10
BOTTOM + 1
R/W
0
0
TOP - 2
TCCR1A
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