ATmega32A Atmel Corporation, ATmega32A Datasheet - Page 134

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ATmega32A

Manufacturer Part Number
ATmega32A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32A

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8155C–AVR–02/11
Table 17-4
mode.
Table 17-4.
Note:
Table 17-5
rect PWM mode
.
Table 17-5.
Note:
• Bit 2:0 – CS2[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
17-6.
Table 17-6.
COM21
CS22
COM21
0
0
1
1
0
0
0
0
1
1
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
match is ignored, but the set or clear is done at TOP. See
more details.
match is ignored, but the set or clear is done at TOP. See
127
shows the COM2[1:0] bit functionality when the WGM21:0 bits are set to phase cor-
shows the COM2[1:0] bit functionality when the WGM21:0 bits are set to fast PWM
COM20
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
Clock Select Bit Description
for more details.
CS21
0
1
0
1
0
0
1
1
0
0
1
1
COM20
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match when up-counting. Set OC2 on compare match
when downcounting.
Set OC2 on compare match when up-counting. Clear OC2 on compare match
when downcounting.
CS20
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match, set OC2 at BOTTOM,
(non-inverting mode)
Set OC2 on compare match, clear OC2 at BOTTOM,
(inverting mode)
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
T
T
T2S
T2S
T2S
T2S
T2S
2
2
S
S
/256 (From prescaler)
/1024 (From prescaler)
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
(1)
“Phase Correct PWM Mode” on page
“Fast PWM Mode” on page 125
(1)
ATmega32A
Table
134
for

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