ATmega16HVB Atmel Corporation, ATmega16HVB Datasheet - Page 113

• Manufacturer Part Number: ATmega16HVB
• Manufacturer: Atmel Corporation

Specifications of ATmega16HVB

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 17
• Ext Interrupts: 15
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

19.7.3
8042D–AVR–10/11
CADCSRC – CC-ADC Control and Status Register C
• Bit 5 – CADRCIE: CC-ADC Regular Current Interrupt Enable
When the CADRCIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Regular Current Interrupt is enabled.
• Bit 4 – CADICIE: CC-ADC Instantaneous Current Interrupt Enable
When the CADICIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Instantaneous Current Interrupt is enabled.
• Bit 2 – CADACIF: CC-ADC Accumulate Current Interrupt Flag
The CADACIF bit is set (one) after the Accumulate Current conversion has completed. The CC-
ADC Accumulate Current Interrupt is executed if the CADACIE bit and the I-bit in SREG are set
(one). CADACIF is cleared by hardware when executing the corresponding Interrupt Handling
Vector. Alternatively, CADACIF is cleared by writing a logic one to the flag.
• Bit 1 – CADRCIF: CC-ADC Regular Current Interrupt Flag
The CADRCIF bit is set (one) when the absolute value of the result of the last CC-ADC conver-
sion is greater than, or equal to, the compare values set by the CC-ADC Regular
Charge/Discharge Current Level Registers. A positive value is compared to the Regular Charge
Current Level, and a negative value is compared to the Regular Discharge Current Level. The
CC-ADC Regular Current Interrupt is executed if the CADRCIE bit and the I-bit in SREG are set
(one). CADRCIF is cleared by hardware when executing the corresponding Interrupt Handling
Vector. Alternatively, CADRCIF is cleared by writing a logic one to the flag.
• Bit 0 – CADICIF: CC-ADC Instantaneous Current Interrupt Flag
The CADICIF bit is set (one) when a CC-ADC Instantaneous Current conversion is completed.
The CC-ADC Instantaneous Current Interrupt is executed if the CADICIE bit and the I-bit in
SREG are set (one). CADICIF is cleared by hardware when executing the corresponding Inter-
rupt Handling vector. Alternatively, CADICIF is cleared by writing a logic one to the flag.
• Bit 7:1 – Reserved
These bits are reserved and will always read as zero.
• Bit 0 – CADVSE: CC-ADC Voltage Scaling Enable
Setting this bit enables the internal Voltage Scaling. When enabling the internal Voltage Scaling
the internal CC-ADC reference will be divided by 2, affecting the Input Voltage Range and the
resulting step-size.
value step-size for the CADVSE settings
Table 19-3.
Bit
(0xE8)
Read/Write
Initial Value
CADVSE
0
1
Input voltage range and the conversion value step-size for the CADVSE settings.
R
7
0
–
Table 19-3 on page 113
Voltage range
R
6
0
–
±200mV
±100mV
R
5
0
–
R
4
–
0
shows the Input Voltage Range and the conversion
Step-size CADAC
1.67µV
0.84µV
3
R
0
–
ATmega16HVB/32HVB
R
2
0
–
R
1
–
0
Step-size CADIC
CADVSE
R/W
53.7µV
26.9µV
0
0
CADCSRC
113