AT90USB162 Atmel Corporation, AT90USB162 Datasheet - Page 103

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AT90USB162

Manufacturer Part Number
AT90USB162
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90USB162

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
21
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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14.8.2
7707F–AVR–11/10
Timer/Counter Control Register B – TCCR0B
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the AT90USB82/162 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 14-8.
Notes:
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
Bit
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
2. BOTTOM = 0x00
1. MAX
WGM2
pare Match is ignored, but the set or clear is done at TOP. See
page 98
0
0
0
0
1
1
1
1
7
FOC0A
W
0
Waveform Generation Mode Bit Description
for more details.
= 0xFF
WGM1
0
0
1
1
0
0
1
1
FOC0B
6
W
0
WGM0
Table
0
1
0
1
0
1
0
1
5
R
0
14-8. Modes of operation supported by the Timer/Counter
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
4
R
0
“Modes of Operation” on page
3
WGM02
R/W
0
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
2
CS02
R/W
0
TOP
AT90USB82/162
“Phase Correct PWM Mode” on
1
CS01
R/W
0
Immediate
Update of
Immediate
OCRx at
TOP
TOP
TOP
TOP
95).
0
CS00
R/W
0
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
TCCR0B
(1)(2)
103

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