AT90CAN64 Atmel Corporation, AT90CAN64 Datasheet - Page 425
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AT90CAN64
Manufacturer Part Number
AT90CAN64
Description
Manufacturer
Atmel Corporation
Specifications of AT90CAN64
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Can
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90CAN64-15AT
Manufacturer:
Atmel
Quantity:
3 327
Company:
Part Number:
AT90CAN64-15AT1
Manufacturer:
Atmel
Quantity:
1 985
Company:
Part Number:
AT90CAN64-15AZ
Manufacturer:
Atmel
Quantity:
1 995
Company:
Part Number:
AT90CAN64-15MT
Manufacturer:
Freescale
Quantity:
100
Company:
Part Number:
AT90CAN64-15MT1
Manufacturer:
Atmel
Quantity:
7 775
Part Number:
AT90CAN64-15MT1
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
AT90CAN64-16AU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
AT90CAN64-16MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7679H–CAN–08/08
20 Analog Comparator ............................................................................. 269
21 Analog to Digital Converter - ADC ..................................................... 273
22 JTAG Interface and On-chip Debug System ..................................... 293
23 Boundary-scan IEEE 1149.1 (JTAG) ................................................... 300
19.12 Examples of CAN Baud Rate Setting .............................................................266
20.1
20.2
20.3
21.1
21.2
21.3
21.4
21.5
21.6
21.7
21.8
22.1
22.2
22.3
22.4
22.5
22.6
22.7
22.8
22.9
22.10 Bibliography ....................................................................................................299
23.1
23.2
23.3
23.4
23.5
23.6
23.7
23.8
Overview .........................................................................................................269
Analog Comparator Register Description .......................................................269
Analog Comparator Multiplexed Input ............................................................271
Features ..........................................................................................................273
Operation ........................................................................................................274
Starting a Conversion .....................................................................................275
Prescaling and Conversion Timing .................................................................276
Changing Channel or Reference Selection ....................................................279
ADC Noise Canceler .......................................................................................280
ADC Conversion Result ..................................................................................284
ADC Register Description ...............................................................................287
Features ..........................................................................................................293
Overview .........................................................................................................293
Test Access Port – TAP ..................................................................................293
TAP Controller ................................................................................................296
Using the Boundary-scan Chain .....................................................................297
Using the On-chip Debug System ..................................................................297
On-chip Debug Specific JTAG Instructions ....................................................298
On-chip Debug Related Register in I/O Memory ............................................299
Using the JTAG Programming Capabilities ....................................................299
Features ..........................................................................................................300
System Overview ............................................................................................300
Data Registers ................................................................................................300
Boundary-scan Specific JTAG Instructions ....................................................302
Boundary-scan Related Register in I/O Memory ............................................304
Boundary-scan Chain .....................................................................................304
AT90CAN32/64/128 Boundary-scan Order ....................................................314
Boundary-scan Description Language Files ...................................................320
AT90CAN32/64/128
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