AT90CAN64 Atmel Corporation, AT90CAN64 Datasheet - Page 262

• Manufacturer Part Number: AT90CAN64
• Manufacturer: Atmel Corporation

Specifications of AT90CAN64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.11.2
262
AT90CAN32/64/128
CAN MOb Control and DLC Register - CANCDMOB
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the BERR flag.
• Bit 3 – SERR: Stuff Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
Detection of more than five consecutive bits with the same polarity. This flag can generate an
interrupt.
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the SERR flag.
• Bit 2 – CERR: CRC Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The receiver performs a CRC check on every de-stuffed received message from the start of
frame up to the data field. If this checking does not match with the de-stuffed CRC field, a CRC
error is set.
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the CERR flag.
• Bit 1 – FERR: Form Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The form error results from one or more violations of the fixed form in the following bit fields:
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the FERR flag.
• Bit 0 – AERR: Acknowledgment Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
No detection of the dominant bit in the acknowledge slot.
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the AERR flag.
• Bit 7:6 – CONMOB1:0: Configuration of Message Object
These bits set the communication to be performed (no initial value after RESET).
• CRC delimiter.
• Acknowledgment delimiter.
• EOF
Initial Value
Read/Write
Bit
CONMOB1 CONMOB0
R/W
7
-
R/W
6
-
RPLV
R/W
5
-
R/W
IDE
4
-
DLC3
R/W
3
-
DLC2
R/W
2
-
DLC1
R/W
1
-
DLC0
R/W
0
-
CANCDMOB
7679H–CAN–08/08