AT32UC3B1128 Atmel Corporation, AT32UC3B1128 Datasheet - Page 402

• Manufacturer Part Number: AT32UC3B1128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B1128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22.8.1.2
Register Name:
Access Type:
Offset:
Reset Value:
• SPEED: Speed Status
• VBUS: VBus Level
• ID: USB_ID Pin State
• VBUSRQ: VBus Request
• STOI: Suspend Time-Out Interrupt
32059L–AVR32–01/2012
STOI
31
23
15
7
-
-
-
This field is set according to the controller speed mode..
This bit is set when the VBus line level is high.
This bit is cleared when the VBus line level is low.
This bit can be used in either device or host mode to monitor the USB bus connection state of the application.
This bit is cleared when the USB_ID level is low, even if USBE is zero.
This bit is set when the USB_ID level is high, event if USBE is zero.
This bit is set when the USBSTASET.VBUSRQS bit is written to one.
This bit is cleared when the USBSTACLR.VBUSRQC bit is written to one or when a VBus error occurs and VBUSHWC is zero.
1: The USB_VBOF output pin is driven high to enable the VBUS power supply generation.
0: The USB_VBOF output pin is driven low to disable the VBUS power supply generation.
This bit shall only be used in host mode.
This bit is set when a time-out error (more than 200ms) has been detected after a suspend. This triggers a USB interrupt if
STOE is one.
This bit is cleared when the UBSTACLR.STOIC bit is written to one.
This bit shall only be used in host mode.
X
0
1
General Status Register
SPEED
30
22
14
6
-
-
-
USBSTA
Read-Only
0x0804
0x00000400
0
0
1
ROLEEXI
29
21
13
5
-
-
Speed Status
Full-Speed mode
Low-Speed mode
Reserved
SPEED
BCERRI
28
20
12
4
-
-
VBERRI
VBUS
27
19
11
3
-
-
26
18
10
ID
2
-
-
VBUSRQ
VBUSTI
25
17
9
1
-
-
IDTI
24
16
8
0
-
-
-
402