AT32UC3B1128 Atmel Corporation, AT32UC3B1128 Datasheet - Page 317

• Manufacturer Part Number: AT32UC3B1128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B1128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.6.5
21.6.5.1
21.6.5.2
Figure 21-30. T=0 Protocol without Parity Error
32059L–AVR32–01/2012
Baud Rate
ISO7816 Mode
Clock
RXD
ISO7816 Mode Overview
Protocol T=0
Start
Bit
The USART features an ISO7816-compatible mode, enabling interfacing with smart cards and
Security Access Modules (SAM) through an ISO7816 compliant link. T=0 and T=1 protocols, as
defined in the ISO7816 standard, are supported by writing 0x4 and 0x6 respectively to
MR.MODE.
ISO7816 specifies half duplex communication on one bidirectional line. The baud rate is a frac-
tion of the clock provided by the master on the CLK pin (see
300). The USART connects to a smart card as shown in
tional and is routed to the receiver when the transmitter is disabled. Having both receiver and
transmitter enabled simultaneously may lead to unpredictable results.
Figure 21-29. USART (master) Connected to a Smart Card
In both T=0 and T=1 modes, the character format is fixed to eight data bits, and one or two stop
bits, regardless of CHRL, MODE9, and CHMODE values. Parity according to specification is
even. If the inverse transmission format is used, where payload data bits are transmitted
inverted on the I/O line, the user can use odd parity and perform an XOR on data headed to
THR and coming from RHR.
In T=0 protocol, a character is made up of one start bit, eight data bits, one parity bit, and a two
bit period guard time. During the guard time, the line will be high if the receiver does not signal a
parity error, as shown in
(NACK), by pulling the line low for a bit period within the guard time, resulting in the total charac-
ter length being incremented by one, see
it detects a parity error, and will set PARE if it receives a NACK.
D0
D1
D2
D3
Figure
USART
D4
TXD
CLK
21-30. The receiver signals a parity error, aka non-acknowledge
D5
D6
Figure
D7
21-31. The USART will not load data to RHR if
Parity
Bit
CLK
I/O
Figure
Time 1
Guard
”Baud Rate Generator” on page
Smart
21-29. The TXD pin is bidirec-
Card
Time 2
Guard
Start
Next
Bit
317