AT32UC3A4128 Atmel Corporation, AT32UC3A4128 Datasheet - Page 140
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AT32UC3A4128
Manufacturer Part Number
AT32UC3A4128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4128
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A4128S-C1UR
Manufacturer:
ATMEL
Quantity:
2 620
Company:
Part Number:
AT32UC3A4128S-CIUT
Manufacturer:
ATMEL
Quantity:
350
Part Number:
AT32UC3A4128S-CIUT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3A4128S-U
Manufacturer:
ATMEL
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12 914
Company:
Part Number:
AT32UC3A4128SC101
Manufacturer:
STM
Quantity:
6 278
Company:
Part Number:
AT32UC3A4128SC1UT
Manufacturer:
ATMEL
Quantity:
6 055
9.8.2.3
32002F–03/2010
Interpreting the results
When restarting NanoTrace after entering debug mode using one of the BREAK modes, the
TAIL register must be updated in order to tell the MSU that there is free space in the trace buffer.
It is perfectly valid to update TAIL to the value it already contains - this is interpreted as making
the entire buffer available. After this, the CPU can be restarted by issuing a retd instruction
through the OCD system. If ntbc is set to BREAK_FLUSH the first new trace message will be a
synchronization message.
The debugger should monitor the RESULT register. The possible values are:
Table 9-55.
Result
NOT_IMPL
CANCELED
BUSY
DONE
BUS_ERR
• DISABLE: The MSU leaves the NanoTrace mode, and goes to idle mode. The OCD system
• BREAK_STOP: The MSU will ask the OCD system to enter debug mode, so no more trace
• BREAK_FLUSH: The MSU will ask the OCD system to enter debug mode, so no more trace
will continue as before, but trace data will go to the trace output port if enabled.
data is generated. There will be a few more trace messages that do not fit in the buffer, so the
CPU is forced to stop until the debugger clears room in the trace buffer. This ensures that no
trace data is lost, but this also means that this mode will deadlock self hosted debuggers, as
the CPU is stalled and can never release room in the trace buffer!
data is generated. There will be a few more trace messages that do not fit in the buffer, but
the MSU will flush these and allow the CPU to enter OCD mode. This means that the last few
messages will be lost!
NanoTrace results
Description
The NanoTrace feature is not implemented in this device.
The NanoTrace operation was canceled by writing a value different from
OP_NANOTRACE to CTRL.
The NanoTrace operation is running.
The NanoTrace operation has completed. This can only happen when the ntbc field is
written to DISABLE.
Part of the specified memory could not be written to.
The offending address can be read out of ADDRHI and ADDRLO.
AVR32
140