AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 122

• Manufacturer Part Number: AT32UC3A1256AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A1256AU

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 69
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
18.7
Security bit
commands, together with the number of the fuse to write/erase, performs the desired
operation.
An entire General-Purpose Fuse byte can be written at a time by using the Program GP Fuse
Byte (PGPFB) instruction. A PGPFB to GP fuse byte 2 is not allowed if the flash is locked by
the security bit. The PFB command is issued with a parameter in the PAGEN field:
All General-Purpose fuses can be erased by the Erase All General-Purpose fuses (EAGP)
command. An EAGP command is not allowed if the flash is locked by the security bit.
Two errors can be detected in the FSR register after issuing these commands:
The lock bits are implemented using the lowest 16 general-purpose fuse bits. This means that
the 16 lowest general-purpose fuse bits can also be written/erased using the commands for
locking/unlocking regions, see
The security bit allows the entire chip to be locked from external JTAG or other debug access
for code security. The security bit can be written by a dedicated command, Set Security Bit
(SSB). Once set, the only way to clear the security bit is through the JTAG Chip Erase
command.
Once the Security bit is set, the following Flash controller commands will be unavailable and
return a lock error if attempted:
One error can be detected in the FSR register after issuing the command:
• PAGEN[2:0] - byte to write
• PAGEN[10:3] - Fuse value to write
• Programming Error: A bad keyword and/or an invalid command have been written in the
• Lock Error: A write or erase of any of the special-function fuse bits in
• Write General-Purpose Fuse Bit (WGPB) to BOOTPROT or EPFL fuses
• Erase General-Purpose Fuse Bit (EGPB) to BOOTPROT or EPFL fuses
• Program General-Purpose Fuse Byte (PGPFB) of fuse byte 2
• Erase All General-Purpose Fuses (EAGPF)
• Programming Error: A bad keyword and/or an invalid command have been written in the
FCMD register.
attempted while the flash is locked by the security bit.
FCMD register.
Section
18.5.3.
Table 18-3
AT32UC3A
was
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