SC68C2550BIB48,151 NXP Semiconductors, SC68C2550BIB48,151 Datasheet - Page 34

• Manufacturer Part Number: SC68C2550BIB48,151
• Description: IC UART DUAL W/FIFO 48-LQFP
• Manufacturer: NXP Semiconductors
• Type: 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s with 16-byte FIFOsr

Specifications of SC68C2550BIB48,151

• Number Of Channels: 2, DUART
• Package / Case: 48-LQFP
• Features: False-start Bit Detection
• Fifo's: 16 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.25 V
• Supply Current: 4.5 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V or 3.3 V or 5 V
• Transmit Fifo: 16Byte
• Receive Fifo: 16Byte
• Transmitter And Receiver Fifo Counter: Yes
• Package Type: LQFP
• Operating Supply Voltage (max): 5.5V
• Mounting: Surface Mount
• Pin Count: 48
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3296; 935278765151; SC68C2550BIB48-S

NXP Semiconductors
14. Revision history
Table 28.
SC68C2550B_3
Product data sheet
Document ID
SC68C2550B_3
Modifications:
SC68C2550B_2
(9397 750 14941)
SC68C2550B_1
(9397 750 14698)
Revision history
Release date
20091009
20050428
20050329
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The format of this data sheet has been redesigned to comply with the new identity guidelines of
NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Data sheet descriptive title changed from “... Motorola P interface” to “... 68 mode P interface”
Section 2
Table 2 “Pin
– Description for RXRDYA, RXRDYB: deleted “This function is associated with PLCC44 and
– Description for TXRDYA, TXRDYB: deleted “This function is associated with PLCC44 and
Table 22 “Limiting
– parameter description for symbol V
– parameter description for symbol T
– symbol for ‘total power dissipation per package” changed from “P
Table 23 “Static
– descriptive line below table title changed from “V
– symbol/parameter changed from “V
– symbol/parameter changed from “V
– symbol/parameter changed from “I
Table 24 “Dynamic
– descriptive line below table title changed from “V
– symbol “t
– symbol “t
–
– added
Figure 5 “General read
Figure 6 “General write
Figure 8 “External clock
– symbol changed from “t
– symbol changed from “t
– symbol changed from “t
updated soldering information
LQFP48 packages only.”
LQFP48 packages only.”
pin”; added separate conditions for “at D7 to D0” and “at any input only pin”
temperature” (moved “operating” to Conditions column)
“tolerance of V
LOW-level input voltage”
HIGH-level input voltage”
“tolerance of V
“t
Table note
WL
, pulse width LOW”
“Features”: added (new) 3
Table note [4]
1w
w1
description”:
[3]: changed denominator from “t
, t
, CS strobe width” changed to “t
Data sheet status
Product data sheet
Product data sheet
Product data sheet
characteristics”:
2w
CC
CC
values”:
” (clock cycle period) separated into 2 symbols “t
characteristics”:
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
10 %”
10 %”
timing”: changed symbol from “t
Rev. 03 — 9 October 2009
timing”: changed symbol from “t
and its reference at t
timing”:
1w
2w
3w
” to “t
” to “t
” to “t
WH
WL
w(clk)
rd
”
”
CL
n
amb
bullet item and
IL(CK)
IH(CK)
”
changed from “voltage at any pin” to “voltage on any other
, clock leakage” to “I
changed from “operating temperature” to “ambient
, LOW-level clock input voltage” to “V
, HIGH-level clock input voltage” to “V
(RESET)
w(CS)
Change notice
-
3w
-
-
” to “t
, CS pulse width”
CC
CC
Footnote 1
w(clk)
= 2.5 V, 3.3 V or 5.0 V
= 2.5 V, 3.3 V or 5.0 V
w1
w1
” to “t
” to “t
”
L(clk)
w(CS)
w(CS)
, clock leakage current”
SC68C2550B
WH
”
”
tot(pack)
, pulse width HIGH” and
Supersedes
SC68C2550B_2
SC68C2550B_1
-
” to “P
© NXP B.V. 2009. All rights reserved.
10 %” to
10 %” to
IL(clk)
tot
IH(clk)
/pack”
, clock
, clock
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