PEB 3086 F V1.4 Infineon Technologies, PEB 3086 F V1.4 Datasheet - Page 207

• Manufacturer Part Number: PEB 3086 F V1.4
• Description: IC ISDN ACCESS CTRLR TQFP64
• Manufacturer: Infineon Technologies
• Series: ISAC™r

Specifications of PEB 3086 F V1.4

• Function: Subscriber Access Controller
• Interface: HDLC, IOM-2, ISDN, Parallel, SCI
• Number Of Circuits: 1
• Voltage - Supply: 3.3V
• Current - Supply: 30mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFQFP
• Includes: D-Channel Access Control and Priority Handler, Monitor Channel Handler, Non-Auto Mode, Transparent Mode
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEB3086FV1.4XT; PEB3086FV14NP; PEB3086FV14XP; SP000007571; SP000007572

SDS_
CONF
MCDA
4.4.13
Value after reset: 00
For general information on SDS1/2_BCL please refer to
DIOM_INV ... DU/DD on IOM Timeslot Inverted
0: DU/DD are active during SDS1 HIGH phase and inactive during the LOW phase.
1: DU/DD are active during SDS1 LOW phase and inactive during the HIGH phase.
This bit has only effect if DIOM_SDS is set to ’1’ otherwise DIOM_INV is don’t care.
DIOM_SDS ... DU/DD on IOM Controlled via SDS1
0: The pin SDS1 and its configuration settings are used for serial data strobe only.
1: The DU/DD lines are deactivated during the during High/Low phase (selected via
SDSx_BCL ... Enable IOM Bit Clock for SDSx
0: The serial data strobe is generated in the programmed timeslot.
1: The IOM bit clock is generated in the programmed timeslot.
4.4.14
Value after reset: FF
MCDAxy ... Monitoring CDAxy Bits
Bit 7 and Bit 6 of the CDAxy registers are mapped into the MCDA register.
This can be used for monitoring the D-channel bits on DU and DD and the ’Echo bits’ on
the TIC bus with the same register
Data Sheet
The IOM-2 data lines are not affected.
DIOM_INV) of the SDS1 signal. The SDS1 timeslot is selected in SDS1_CR.
7
7
SDS_CONF - Configuration Register for Serial Data Strobes
MCDA - Monitoring CDA Bits
Bit7
MCDA21
0
Bit6
H
H
0
Bit7
0
MCDA20
Bit6
0
207
DIOM_
Bit7
INV
MCDA11
DIOM_
SDS
Bit6
Detailed Register Description
Chapter
SDS2_
BCL
Bit7
MCDA10
0
0
3.7.2.
SDS1_
BCL
Bit6
RD/WR (5A)
PEB 3086
2003-01-30
ISAC-SX
RD (5B)