DS21Q55 Maxim Integrated Products, DS21Q55 Datasheet - Page 132

• Manufacturer Part Number: DS21Q55
• Description: IC TXRX QUAD T1/E1/J1 SCT 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q55

• Function: Transceiver
• Interface: E1, J1, T1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Includes: BERT Generator and Detector, Dual HDLC Controllers
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit CRC Defeat (TCRCD). A 2-byte CRC code is automatically appended to the outbound message.
This bit can be used to disable the CRC function.
Bit 1/Transmit Zero-Stuffer Defeat (TZSD). The zero-stuffer function automatically inserts a 0 in the message
field (between the flags) after five consecutive 1s to prevent the emulation of a flag or abort sequence by the data
pattern. The receiver automatically removes (destuffs) any 0 after five 1s in the message field.
Bit 2/Transmit End of Message (TEOM). Should be set to a 1 just before the last data byte of an HDLC packet is
written into the transmit FIFO at HxTF. If not disabled through TCRCD, the transmitter automatically appends a 2-
byte CRC code to the end of the message.
Bit 3/Transmit Flag/Idle Select (TFS). This bit selects the intermessage fill character after the closing and before
the opening flags (7Eh).
Bit 4/Transmit HDLC Mapping Select (THMS)
Bit 5/Transmit HDLC Reset (THR). Resets the transmit HDLC controller and flushes the transmit FIFO. An
abort followed by 7Eh or FFh flags/idle is transmitted until a new packet is initiated by writing new data into the
FIFO. Must be cleared and set again for a subsequent reset.
Bit 6/Transmit End of Message and Loop (TEOML). To loop on a message, this bit should be set to a 1 just
before the last data byte of an HDLC packet is written into the transmit FIFO. The message repeats until the user
clears this bit or a new message is written to the transmit FIFO. If the host clears the bit, the looping message
completes, then flags are transmitted until a new message is written to the FIFO. If the host terminates the loop by
writing a new message to the FIFO, the loop terminates, one or two flags are transmitted, and the new message
starts. If not disabled through TCRCD, the transmitter automatically appends a 2-byte CRC code to the end of all
messages. This is useful for transmitting consecutive SS7 FISUs without host intervention.
Bit 7/Number of Flags Select (NOFS)
0 = enable CRC generation (normal operation)
1 = disable CRC generation
0 = enable the zero stuffer (normal operation)
1 = disable the zero stuffer
0 = 7Eh
1 = FFh
0 = transmit HDLC assigned to channels
1 = transmit HDLC assigned to FDL (T1 mode), Sa bits (E1 mode)
0 = normal operation
1 = reset transmit HDLC controller and flush the transmit FIFO
0 = send one flag between consecutive messages
1 = send two flags between consecutive messages
NOFS
7
0
TEOML
H1TC, H2TC
HDLC #1 Transmit Control
HDLC #2 Transmit Control
90h, A0h
6
0
THR
5
0
THMS
4
0
132 of 237
TFS
0
3
TEOM
2
0
TZSD
1
0
TCRCD
0
0