DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 28

IC TXRX T1/E1/J1 1-CHIP 100-LQFP

DS2156L+

Manufacturer Part Number
DS2156L+
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2156L+

Function
Single-Chip Transceiver
Interface
E1, J1, T1, TDM, UTOPIA II
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
3.3
Signal Name:
Signal Description:
Signal Type:
Flags host controller during conditions and events defined in the status registers. Active-low, open-drain output.
Signal Name:
Signal Description:
Signal Type:
A dual function pin. A 0-to-1 transition issues a hardware reset to the DS2156 register set. A reset clears all
configuration registers. Configuration register contents are set to 0. Leaving TSTRST high tri-states all output and
I/O pins (including the parallel control port). Set low for normal operation. Useful in board-level testing.
Signal Name:
Signal Description:
Signal Type:
Set low to select nonmultiplexed bus operation. Set high to select multiplexed bus operation.
Signal Name:
Signal Description:
Signal Type:
In nonmultiplexed bus operation (MUX = 0), these serve as the data bus. In multiplexed bus operation (MUX = 1),
these pins serve as an 8-bit multiplexed address/data bus.
Signal Name:
Signal Description:
Signal Type:
In nonmultiplexed bus operation (MUX = 0), these serve as the address bus. In multiplexed bus operation
(MUX = 1), these pins are not used and should be connected low.
Signal Name:
Signal Description:
Signal Type:
Strap high to select Motorola bus timing; strap low to select Intel bus timing. This pin controls the function of the
RD (DS), ALE (AS), and WR (R/W) pins.
If BTS = 1, then these pins assume the function listed in parentheses ().
Signal Name:
Signal Description:
Signal Type:
RD and DS are active-low signals. DS active HIGH when MUX = 1. See Bus Timing Diagrams.
Parallel Control Port Pins
INT
Interrupt
Output
TSTRST
Tri-State Control and Device Reset
Input
MUX
Bus Operation
Input
AD0 to AD7
Data Bus [D0 to D7] or Address/Data Bus
Input/Output
A0 to A6
Address Bus
Input
BTS
Bus Type Select
Input
RD (DS)
Read Input, Data Strobe
Input
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