DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 192
DS2156L+
Manufacturer Part Number
DS2156L+
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2156L.pdf
(265 pages)
Specifications of DS2156L+
Function
Single-Chip Transceiver
Interface
E1, J1, T1, TDM, UTOPIA II
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Diagnostic Loopback Enable (DLBE)
Bit 1/Receive Physical Layer Interface Mode (RPLIM)
Bit 2/Bit must be set = 1 after reset for proper UTOPIA bus mode operation
Bit 3/Receive FIFO Overrun Interrupt Mask (RFOIM)
Bit 4/LCD Interrupt Mask (LCDIM)
Bits 5 to 7/Unassigned, must be set to 0 for proper operation
0 = normal operation
1 = diagnostic loopback is enabled. In this loopback, the transmit data and clock is looped back onto the
receive side. Receiver uses transmit data and clock instead of receive data and clock from physical layer
(typically framer).
0 = clock + data + frame pulse combination
1 = gapped clock + data combination
0 = DS2156 does not generate external interrupt for receive FIFO overrun events
1 = DS2156 generates external interrupt if receive FIFO overrun condition has occurred
0 = DS2156 does not generate external interrupt for LCD state changes
1 = DS2156 generates external interrupt if LCD state has changed
—
7
0
—
U_RCR2
UTOPIA Receive Control Register 2
6Ah
6
0
—
5
0
LCDIM
4
0
192 of 265
RFOIM
3
0
—
2
0
RPLIM
1
0
DLBE
0
0
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