DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 191

• Manufacturer Part Number: DS2156L+
• Description: IC TXRX T1/E1/J1 1-CHIP 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS2156L+

• Function: Single-Chip Transceiver
• Interface: E1, J1, T1, TDM, UTOPIA II
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive COSET Subtraction Enable (RCSE)
Bit 1/Receive HEC-Error Correction Enable (RHECE)
Bit 2/Receive Descrambling Enable (RDE)
Bit 3/Receive Pass HEC-Errored Cells (RPHEC)
Bit 4/Receive Idle Cell-Filter Enable (RICFE)
Bit 5/Receive Unassigned Cell-Filter Enable (RUCFE)
Bits 6, 7/Unassigned, must be set to 0 for proper operation
0 = DS2156 does not do COSET subtraction from the HEC byte for checking HEC
1 = DS2156 subtracts COSET polynomial (0 x 55) from the HEC byte for checking HEC
0 = single-bit HEC-error correction is disabled
1 = DS2156 corrects single-bit HEC errors based on the current state of receiver mode of operation. Single-
bit error correction is done only if this bit is set and receiver mode of operation is in CORRECTION state.
0 = payload descrambling is disabled
1 = payload descrambling is enabled. Payload of cells received in PRESYNC and SYNC state of cell
delineation are descrambled based on the self-synchronizing polynomial X
by descrambling.
0 = DS2156 passes only error-free and error-corrected cells to ATM layer
1 = DS2156 passes all cells including HEC-errored cells, received when cell delineation is SYNC to ATM
layer
0 = DS2156 does not filter idle cells
1 = DS2156 filters all idle cells received from being written into receive FIFO. The cell header of idle cell
(first five bytes) is 0x00, 0x00, 0x00, 0x01 and proper HEC byte. Cell payload is not considered for idle
cell filtering.
0 = DS2156 will NOT filter unassigned cells.
1 = DS2156 filters all unassigned cells received from being written into receive FIFO. The cell header of
unassigned cell (first five bytes) is 0x00, 0x00, 0x00, 0x00, and proper HEC byte. Cell payload is not
considered for unassigned cell filtering
—
7
0
—
U_RCR1
UTOPIA Receive Control Register 1
69h
6
0
RUCFE
5
0
RICFE
4
0
191 of 265
RPHEC
3
0
RDE
2
0
RHECE
43
1
0
+ 1. Cell header is unaffected
RCSE
0
1