DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 146

• Manufacturer Part Number: DS2156L+
• Description: IC TXRX T1/E1/J1 1-CHIP 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS2156L+

• Function: Single-Chip Transceiver
• Interface: E1, J1, T1, TDM, UTOPIA II
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

22.3.5
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit HDLC Data Bit 0 (THD0). LSB of an HDLC packet data byte.
Bit 1/Transmit HDLC Data Bit 1 (THD1)
Bit 2/Transmit HDLC Data Bit 2 (THD2)
Bit 3/Transmit HDLC Data Bit 3 (THD3)
Bit 4/Transmit HDLC Data Bit 4 (THD4)
Bit 5/Transmit HDLC Data Bit 5 (THD5)
Bit 6/Transmit HDLC Data Bit 6 (THD6)
Bit 7/Transmit HDLC Data Bit 7 (THD7). MSB of an HDLC packet data byte.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive HDLC Data Bit 0 (RHD0). LSB of an HDLC packet data byte.
Bit 1/Receive HDLC Data Bit 1 (RHD1)
Bit 2/Receive HDLC Data Bit 2 (RHD2)
Bit 3/Receive HDLC Data Bit 3 (RHD3)
Bit 4/Receive HDLC Data Bit 4 (RHD4)
Bit 5/Receive HDLC Data Bit 5 (RHD5)
Bit 6/Receive HDLC Data Bit 6 (RHD6)
Bit 7/Receive HDLC Data Bit 7 (RHD7). MSB of an HDLC packet data byte.
HDLC FIFOs
RHD7
THD7
7
7
0
0
THD6
RHD6
H1TF, H2TF
HDLC # 1 Transmit FIFO
HDLC # 2 Transmit FIFO
9Dh, ADh
H1RF, H2RF
HDLC # 1 Receive FIFO
HDLC # 2 Receive FIFO
9Eh, AEh
6
0
6
0
RHD5
THD5
5
0
5
0
RHD4
THD4
4
0
4
0
146 of 265
RHD3
THD3
3
0
3
0
THD2
RHD2
2
0
2
0
RHD1
THD1
1
0
1
0
THD0
RHD0
0
0
0
0