AM186CC-25KI\W C AMD (ADVANCED MICRO DEVICES), AM186CC-25KI\W C Datasheet - Page 22

• Manufacturer Part Number: AM186CC-25KI\W C
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM186CC-25KI\W C

• Lead Free Status / Rohs Status: Not Compliant

22
Signal Name
PROGRAMMABLE I/O (PIOS)
PIO47–PIO0
PROGRAMMABLE TIMERS
[PWD]
[TMRIN1]
[TMRIN0]
[TMROUT1]
[TMROUT0]
ASYNCHRONOUS SERIAL PORTS (UART AND HIGH-SPEED UART)
UART
[RXD_U]
[TXD_U]
Multiplexed
Signal(s)
(For multiplexed
signals see Table
29, “PIOs Sorted
by PIO Number,”
on page A-8 and
Table 30, “PIOs
Sorted by Signal
Name,” on page
A-9.)
[INT8]
PIO6
PIO0
PIO27
PIO1
PIO28
DCE_RXD_D
[PCM_RXD_D]
PIO26
[DCE_TXD_D]
[PCM_TXD_D]
PIO20
Am186™CC Communications Controller Data Sheet
Table 4. Signal Descriptions (Continued)
Type Description
STI
STI
STI
STI
B
O
O
O
Shared Programmable I/O pins can be programmed with the following
attributes: PIO function (enabled/disabled), direction (input/output), and weak
pullup or pulldown.
After a reset, the PIO pins default to various configurations. The column entitled
“Pin Configuration Following System Reset” in Table 29 on page A-8 and
Table 30 on page A-9 lists the defaults for the PIOs. Most of the PIO pins are
configured as PIO inputs with pullup after reset. See Table 35 on page A-12 for
detailed termination information for all pins. The system initialization code must
reconfigure any PIO pins as required.
PIO5, PIO15, PIO27, PIO29, PIO30, and PIO33–PIO35 are capable of
generating an interrupt on the shared interrupt channel 14.
The multiplexed signals ALE, ARDY, BHE, DEN, DT/R, PCS1–PCS0, SRDY, and
WR default to non-PIO operation at reset.
The following PIO signals are multiplexed with alternate signals that can be used
by emulators: PIO8, PIO15, PIO33, PIO34, and PIO35. Consider any emulator
requirements for the alternate signals before using these pins as PIOs.
Pulse-Width Demodulator: If pulse-width demodulation is enabled, [PWD]
processes a signal through the Schmitt trigger input. [PWD] is used internally to
drive [TMRIN0] and [INT8], and [PWD] is inverted internally to drive [TMRIN1]
and an additional internal interrupt. If interrupts are enabled and Timer 0 and
Timer 1 are properly configured, the pulse width of the alternating [PWD] signal
can be calculated by comparing the values in Timer 0 and Timer 1.
In PWD mode, the signals [TMRIN0]/PIO27 and [TMRIN1]/PIO0 can be used as
PIOs. If they are not used as PIOs they are ignored internally.
The additional internal interrupt used in PWD mode uses the same interrupt
channel as [INT7]. If [INT7] is to be used, it must be assigned to the shared
interrupt channel.
Timer Inputs 1–0 supply a clock or control signal to the internal Am186CC
controller timers. After internally synchronizing a Low-to-High transition on
[TMRIN1]–[TMRIN0], the microcontroller increments the timer. [TMRIN1]–
[TMRIN0] must be tied High if not being used. When PIO is enabled for one or
both, the pin is pulled High internally.
[TMRIN1]–[TMRIN0] are driven internally by [INT8]/[PWD] when pulse-width
demodulation functionality is enabled. The [TMRIN1]–[TMRIN0] pins can be
used as PIOs when pulse-width demodulation is enabled.
Timer Outputs 1–0 supply the system with either a single pulse or a continuous
waveform with a programmable duty cycle. [TMROUT1]–[TMROUT0] are three-
stated during bus-hold or reset conditions.
Receive Data UART is the asynchronous serial receive data signal that supplies
data from the asynchronous serial port to the microcontroller.
Transmit Data UART is the asynchronous serial transmit data signal that
supplies data to the asynchronous serial port from the microcontroller